1/*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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57
58 // XXX all the below need to be updated for SPARC - Ali
59 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
60 brk_point = roundUp(brk_point, VMPageSize);
61
62 // Set pointer for next thread stack. Reserve 8M for main stack.
63 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
64
65 //Initialize these to 0s
66 fillStart = 0;
67 spillStart = 0;
68}
69
70void SparcLiveProcess::handleTrap(int trapNum, ThreadContext *tc)
71{
72 PCState pc = tc->pcState();
73 switch(trapNum)
74 {
75 case 0x01: //Software breakpoint
76 warn("Software breakpoint encountered at pc %#x.\n", pc.pc());
77 break;
78 case 0x02: //Division by zero
79 warn("Software signaled a division by zero at pc %#x.\n", pc.pc());
80 break;
81 case 0x03: //Flush window trap
82 flushWindows(tc);
83 break;
84 case 0x04: //Clean windows
85 warn("Ignoring process request for clean register "
86 "windows at pc %#x.\n", pc.pc());
87 break;
88 case 0x05: //Range check
89 warn("Software signaled a range check at pc %#x.\n", pc.pc());
90 break;
91 case 0x06: //Fix alignment
92 warn("Ignoring process request for os assisted unaligned accesses "
93 "at pc %#x.\n", pc.pc());
94 break;
95 case 0x07: //Integer overflow
96 warn("Software signaled an integer overflow at pc %#x.\n", pc.pc());
97 break;
98 case 0x32: //Get integer condition codes
99 warn("Ignoring process request to get the integer condition codes "
100 "at pc %#x.\n", pc.pc());
101 break;
102 case 0x33: //Set integer condition codes
103 warn("Ignoring process request to set the integer condition codes "
104 "at pc %#x.\n", pc.pc());
105 break;
106 default:
107 panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum);
108 }
109}
110
111void
112SparcLiveProcess::initState()
113{
114 LiveProcess::initState();
115
116 ThreadContext *tc = system->getThreadContext(contextIds[0]);
117 //From the SPARC ABI
118
119 //Setup default FP state
120 tc->setMiscRegNoEffect(MISCREG_FSR, 0);
121
122 tc->setMiscRegNoEffect(MISCREG_TICK, 0);
123
124 /*
125 * Register window management registers
126 */
127
128 //No windows contain info from other programs
129 //tc->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
130 tc->setIntReg(NumIntArchRegs + 6, 0);
131 //There are no windows to pop
132 //tc->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
133 tc->setIntReg(NumIntArchRegs + 4, 0);
134 //All windows are available to save into
135 //tc->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
136 tc->setIntReg(NumIntArchRegs + 3, NWindows - 2);
137 //All windows are "clean"
138 //tc->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
139 tc->setIntReg(NumIntArchRegs + 5, NWindows);
140 //Start with register window 0
141 tc->setMiscReg(MISCREG_CWP, 0);
142 //Always use spill and fill traps 0
143 //tc->setMiscRegNoEffect(MISCREG_WSTATE, 0);
144 tc->setIntReg(NumIntArchRegs + 7, 0);
145 //Set the trap level to 0
146 tc->setMiscRegNoEffect(MISCREG_TL, 0);
147 //Set the ASI register to something fixed
148 tc->setMiscRegNoEffect(MISCREG_ASI, ASI_PRIMARY);
149
150 /*
151 * T1 specific registers
152 */
153 //Turn on the icache, dcache, dtb translation, and itb translation.
154 tc->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL, 15);
155}
156
157void
158Sparc32LiveProcess::initState()
159{
160 SparcLiveProcess::initState();
161
162 ThreadContext *tc = system->getThreadContext(contextIds[0]);
163 //The process runs in user mode with 32 bit addresses
164 tc->setMiscReg(MISCREG_PSTATE, 0x0a);
165
166 argsInit(32 / 8, VMPageSize);
167}
168
169void
170Sparc64LiveProcess::initState()
171{
172 SparcLiveProcess::initState();
173
174 ThreadContext *tc = system->getThreadContext(contextIds[0]);
175 //The process runs in user mode
176 tc->setMiscReg(MISCREG_PSTATE, 0x02);
177
178 argsInit(sizeof(IntReg), VMPageSize);
179}
180
181template<class IntType>
182void
183SparcLiveProcess::argsInit(int pageSize)
184{
185 int intSize = sizeof(IntType);
186
187 typedef AuxVector<IntType> auxv_t;
188
189 std::vector<auxv_t> auxv;
190
191 string filename;
192 if(argv.size() < 1)
193 filename = "";
194 else
195 filename = argv[0];
196
197 //Even for a 32 bit process, the ABI says we still need to
198 //maintain double word alignment of the stack pointer.
199 uint64_t align = 16;
200
201 // load object file into target memory
202 objFile->loadSections(initVirtMem);
203
204 enum hardwareCaps
205 {
206 M5_HWCAP_SPARC_FLUSH = 1,
207 M5_HWCAP_SPARC_STBAR = 2,
208 M5_HWCAP_SPARC_SWAP = 4,
209 M5_HWCAP_SPARC_MULDIV = 8,
210 M5_HWCAP_SPARC_V9 = 16,
211 //This one should technically only be set
212 //if there is a cheetah or cheetah_plus tlb,
213 //but we'll use it all the time
214 M5_HWCAP_SPARC_ULTRA3 = 32
215 };
216
217 const int64_t hwcap =
218 M5_HWCAP_SPARC_FLUSH |
219 M5_HWCAP_SPARC_STBAR |
220 M5_HWCAP_SPARC_SWAP |
221 M5_HWCAP_SPARC_MULDIV |
222 M5_HWCAP_SPARC_V9 |
223 M5_HWCAP_SPARC_ULTRA3;
224
225 //Setup the auxilliary vectors. These will already have endian conversion.
226 //Auxilliary vectors are loaded only for elf formatted executables.
227 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
228 if(elfObject)
229 {
230 //Bits which describe the system hardware capabilities
231 auxv.push_back(auxv_t(M5_AT_HWCAP, hwcap));
232 //The system page size
233 auxv.push_back(auxv_t(M5_AT_PAGESZ, SparcISA::VMPageSize));
234 //Defined to be 100 in the kernel source.
235 //Frequency at which times() increments
236 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
237 // For statically linked executables, this is the virtual address of the
238 // program header tables if they appear in the executable image
239 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
240 // This is the size of a program header entry from the elf file.
241 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
242 // This is the number of program headers from the original elf file.
243 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
244 //This is the address of the elf "interpreter", It should be set
245 //to 0 for regular executables. It should be something else
246 //(not sure what) for dynamic libraries.
247 auxv.push_back(auxv_t(M5_AT_BASE, 0));
248 //This is hardwired to 0 in the elf loading code in the kernel
249 auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
250 //The entry point to the program
251 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
252 //Different user and group IDs
253 auxv.push_back(auxv_t(M5_AT_UID, uid()));
254 auxv.push_back(auxv_t(M5_AT_EUID, euid()));
255 auxv.push_back(auxv_t(M5_AT_GID, gid()));
256 auxv.push_back(auxv_t(M5_AT_EGID, egid()));
257 //Whether to enable "secure mode" in the executable
258 auxv.push_back(auxv_t(M5_AT_SECURE, 0));
259 }
260
261 //Figure out how big the initial stack needs to be
262
263 // The unaccounted for 8 byte 0 at the top of the stack
264 int sentry_size = 8;
265
266 //This is the name of the file which is present on the initial stack
267 //It's purpose is to let the user space linker examine the original file.
268 int file_name_size = filename.size() + 1;
269
270 int env_data_size = 0;
271 for (int i = 0; i < envp.size(); ++i) {
272 env_data_size += envp[i].size() + 1;
273 }
274 int arg_data_size = 0;
275 for (int i = 0; i < argv.size(); ++i) {
276 arg_data_size += argv[i].size() + 1;
277 }
278
279 //The info_block.
280 int base_info_block_size =
281 sentry_size + file_name_size + env_data_size + arg_data_size;
282
283 int info_block_size = roundUp(base_info_block_size, align);
284
285 int info_block_padding = info_block_size - base_info_block_size;
286
287 //Each auxilliary vector is two words
288 int aux_array_size = intSize * 2 * (auxv.size() + 1);
289
290 int envp_array_size = intSize * (envp.size() + 1);
291 int argv_array_size = intSize * (argv.size() + 1);
292
293 int argc_size = intSize;
294 int window_save_size = intSize * 16;
295
296 //Figure out the size of the contents of the actual initial frame
297 int frame_size =
298 aux_array_size +
299 envp_array_size +
300 argv_array_size +
301 argc_size +
302 window_save_size;
303
304 //There needs to be padding after the auxiliary vector data so that the
305 //very bottom of the stack is aligned properly.
306 int aligned_partial_size = roundUp(frame_size, align);
307 int aux_padding = aligned_partial_size - frame_size;
308
309 int space_needed =
310 info_block_size +
311 aux_padding +
312 frame_size;
313

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349 assert(window_save_base == stack_min);
350
351 // write contents to stack
352
353 // figure out argc
354 IntType argc = argv.size();
355 IntType guestArgc = SparcISA::htog(argc);
356
357 //Write out the sentry void *
358 uint64_t sentry_NULL = 0;
359 initVirtMem->writeBlob(sentry_base,
360 (uint8_t*)&sentry_NULL, sentry_size);
361
362 //Write the file name
363 initVirtMem->writeString(file_name_base, filename.c_str());
364
365 //Copy the aux stuff
366 for(int x = 0; x < auxv.size(); x++)
367 {
368 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
369 (uint8_t*)&(auxv[x].a_type), intSize);
370 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
371 (uint8_t*)&(auxv[x].a_val), intSize);
372 }
373
374 //Write out the terminating zeroed auxilliary vector
375 const IntType zero = 0;
376 initVirtMem->writeBlob(auxv_array_base + intSize * 2 * auxv.size(),
377 (uint8_t*)&zero, intSize);
378 initVirtMem->writeBlob(auxv_array_base + intSize * (2 * auxv.size() + 1),
379 (uint8_t*)&zero, intSize);
380
381 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
382 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
383
384 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
385
386 //Set up space for the trap handlers into the processes address space.
387 //Since the stack grows down and there is reserved address space abov
388 //it, we can put stuff above it and stay out of the way.
389 fillStart = stack_base;
390 spillStart = fillStart + sizeof(MachInst) * numFillInsts;
391
392 ThreadContext *tc = system->getThreadContext(contextIds[0]);
393 //Set up the thread context to start running the process
394 //assert(NumArgumentRegs >= 2);
395 //tc->setIntReg(ArgumentReg[0], argc);
396 //tc->setIntReg(ArgumentReg[1], argv_array_base);
397 tc->setIntReg(StackPointerReg, stack_min - StackBias);
398
399 // %g1 is a pointer to a function that should be run at exit. Since we
400 // don't have anything like that, it should be set to 0.
401 tc->setIntReg(1, 0);
402
403 tc->pcState(objFile->entryPoint());
404
405 //Align the "stack_min" to a page boundary.
406 stack_min = roundDown(stack_min, pageSize);
407
408// num_processes++;
409}
410
411void
412Sparc64LiveProcess::argsInit(int intSize, int pageSize)
413{

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435void Sparc32LiveProcess::flushWindows(ThreadContext *tc)
436{
437 IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
438 IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
439 IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
440 MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
441 MiscReg origCWP = CWP;
442 CWP = (CWP + Cansave + 2) % NWindows;
443 while(NWindows - 2 - Cansave != 0)
444 {
445 if (Otherwin) {
446 panic("Otherwin non-zero.\n");
447 } else {
448 tc->setMiscReg(MISCREG_CWP, CWP);
449 //Do the stores
450 IntReg sp = tc->readIntReg(StackPointerReg);
451 for (int index = 16; index < 32; index++) {
452 uint32_t regVal = tc->readIntReg(index);
453 regVal = htog(regVal);
454 if (!tc->getMemPort()->tryWriteBlob(
455 sp + (index - 16) * 4, (uint8_t *)&regVal, 4)) {
456 warn("Failed to save register to the stack when "
457 "flushing windows.\n");

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462 CWP = (CWP + 1) % NWindows;
463 }
464 }
465 tc->setIntReg(NumIntArchRegs + 3, Cansave);
466 tc->setIntReg(NumIntArchRegs + 4, Canrestore);
467 tc->setMiscReg(MISCREG_CWP, origCWP);
468}
469
470void Sparc64LiveProcess::flushWindows(ThreadContext *tc)
471{
472 IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
473 IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
474 IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
475 MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
476 MiscReg origCWP = CWP;
477 CWP = (CWP + Cansave + 2) % NWindows;
478 while(NWindows - 2 - Cansave != 0)
479 {
480 if (Otherwin) {
481 panic("Otherwin non-zero.\n");
482 } else {
483 tc->setMiscReg(MISCREG_CWP, CWP);
484 //Do the stores
485 IntReg sp = tc->readIntReg(StackPointerReg);
486 for (int index = 16; index < 32; index++) {
487 IntReg regVal = tc->readIntReg(index);
488 regVal = htog(regVal);
489 if (!tc->getMemPort()->tryWriteBlob(
490 sp + 2047 + (index - 16) * 8, (uint8_t *)&regVal, 8)) {
491 warn("Failed to save register to the stack when "
492 "flushing windows.\n");

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536{
537 // check for error condition. SPARC syscall convention is to
538 // indicate success/failure in reg the carry bit of the ccr
539 // and put the return value itself in the standard return value reg ().
540 if (return_value.successful()) {
541 // no error, clear XCC.C
542 tc->setIntReg(NumIntArchRegs + 2,
543 tc->readIntReg(NumIntArchRegs + 2) & 0xEE);
544 //tc->setMiscRegNoEffect(MISCREG_CCR, tc->readMiscRegNoEffect(MISCREG_CCR) & 0xEE);
545 IntReg val = return_value.value();
546 if (bits(tc->readMiscRegNoEffect(
547 SparcISA::MISCREG_PSTATE), 3, 3)) {
548 val = bits(val, 31, 0);
549 }
550 tc->setIntReg(ReturnValueReg, val);
551 } else {
552 // got an error, set XCC.C
553 tc->setIntReg(NumIntArchRegs + 2,
554 tc->readIntReg(NumIntArchRegs + 2) | 0x11);
555 //tc->setMiscRegNoEffect(MISCREG_CCR, tc->readMiscRegNoEffect(MISCREG_CCR) | 0x11);
556 IntReg val = -return_value.value();
557 if (bits(tc->readMiscRegNoEffect(
558 SparcISA::MISCREG_PSTATE), 3, 3)) {
559 val = bits(val, 31, 0);
560 }
561 tc->setIntReg(ReturnValueReg, val);
562 }
563}