pagetable.hh (5013:d789d5458d81) pagetable.hh (5184:8782de2949e5)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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185 contextId == r2.contextId &&
186 partitionId == r2.partitionId &&
187 real == r2.real;
188 }
189};
190
191
192struct TlbEntry {
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 176 unchanged lines hidden (view full) ---

185 contextId == r2.contextId &&
186 partitionId == r2.partitionId &&
187 real == r2.real;
188 }
189};
190
191
192struct TlbEntry {
193 Addr pageStart;
193 TlbEntry(Addr asn, Addr vaddr, Addr paddr)
194 {
195 uint64_t entry = 0;
196 entry |= 1ULL << 1; // Writable
197 entry |= 0ULL << 2; // Available in nonpriveleged mode
198 entry |= 0ULL << 3; // No side effects
199 entry |= 1ULL << 4; // Virtually cachable
200 entry |= 1ULL << 5; // Physically cachable
201 entry |= 0ULL << 6; // Not locked
202 entry |= mbits(paddr, 39, 13); // Physical address
203 entry |= 0ULL << 48; // size = 8k
204 entry |= 0uLL << 59; // Endianness not inverted
205 entry |= 0ULL << 60; // Not no fault only
206 entry |= 0ULL << 61; // size = 8k
207 entry |= 1ULL << 63; // valid
208 pte = PageTableEntry(entry);
209
210 range.va = vaddr;
211 range.size = 8*(1<<10);
212 range.contextId = asn;
213 range.partitionId = 0;
214 range.real = false;
215
216 valid = true;
217 }
194 TlbEntry()
195 {}
218 TlbEntry()
219 {}
196 TlbEntry(Addr addr) : pageStart(addr)
197 {}
198 TlbRange range;
199 PageTableEntry pte;
200 bool used;
201 bool valid;
202
220 TlbRange range;
221 PageTableEntry pte;
222 bool used;
223 bool valid;
224
225 Addr pageStart()
226 {
227 return pte.paddr();
228 }
229
203 void serialize(std::ostream &os);
204 void unserialize(Checkpoint *cp, const std::string &section);
205
206};
207
208
209}; // namespace SparcISA
210
211#endif // __ARCH_SPARC_PAGE_TABLE_HH__
212
230 void serialize(std::ostream &os);
231 void unserialize(Checkpoint *cp, const std::string &section);
232
233};
234
235
236}; // namespace SparcISA
237
238#endif // __ARCH_SPARC_PAGE_TABLE_HH__
239