locked_mem.hh (10030:b531e328342d) | locked_mem.hh (12218:8c5db15dc8e7) |
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1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 23 unchanged lines hidden (view full) --- 32#define __ARCH_SPARC_LOCKED_MEM_HH__ 33 34/** 35 * @file 36 * 37 * ISA-specific helper functions for locked memory accesses. 38 */ 39 | 1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 23 unchanged lines hidden (view full) --- 32#define __ARCH_SPARC_LOCKED_MEM_HH__ 33 34/** 35 * @file 36 * 37 * ISA-specific helper functions for locked memory accesses. 38 */ 39 |
40#include "mem/packet.hh" 41#include "mem/request.hh" | 40#include "arch/generic/locked_mem.hh" |
42 | 41 |
43namespace SparcISA 44{ 45template <class XC> 46inline void 47handleLockedSnoop(XC *xc, PacketPtr pkt, Addr cacheBlockMask) 48{ 49} 50 51template <class XC> 52inline void 53handleLockedRead(XC *xc, Request *req) 54{ 55} 56 57template <class XC> 58inline void 59handleLockedSnoopHit(XC *xc) 60{ 61} 62 63 64template <class XC> 65inline bool 66handleLockedWrite(XC *xc, Request *req, Addr cacheBlockMask) 67{ 68 return true; 69} 70 71 72} // namespace SparcISA 73 | |
74#endif | 42#endif |