isa_traits.hh (4997:e7380529bd2d) isa_traits.hh (5228:b08c9c42907a)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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28 * Authors: Gabe Black
29 * Ali Saidi
30 */
31
32#ifndef __ARCH_SPARC_ISA_TRAITS_HH__
33#define __ARCH_SPARC_ISA_TRAITS_HH__
34
35#include "arch/sparc/types.hh"
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 19 unchanged lines hidden (view full) ---

28 * Authors: Gabe Black
29 * Ali Saidi
30 */
31
32#ifndef __ARCH_SPARC_ISA_TRAITS_HH__
33#define __ARCH_SPARC_ISA_TRAITS_HH__
34
35#include "arch/sparc/types.hh"
36#include "arch/sparc/max_inst_regs.hh"
36#include "arch/sparc/sparc_traits.hh"
37#include "config/full_system.hh"
38#include "sim/host.hh"
39
40class StaticInstPtr;
41
42namespace BigEndianGuest {}
43
44namespace SparcISA
45{
46 class RegFile;
47
48 const int MachineBytes = 8;
49
50 //This makes sure the big endian versions of certain functions are used.
51 using namespace BigEndianGuest;
37#include "arch/sparc/sparc_traits.hh"
38#include "config/full_system.hh"
39#include "sim/host.hh"
40
41class StaticInstPtr;
42
43namespace BigEndianGuest {}
44
45namespace SparcISA
46{
47 class RegFile;
48
49 const int MachineBytes = 8;
50
51 //This makes sure the big endian versions of certain functions are used.
52 using namespace BigEndianGuest;
53 using SparcISAInst::MaxInstSrcRegs;
54 using SparcISAInst::MaxInstDestRegs;
52
53 // SPARC has a delay slot
54 #define ISA_HAS_DELAY_SLOT 1
55
56 // SPARC NOP (sethi %(hi(0), g0)
57 const MachInst NoopMachInst = 0x01000000;
58
59 // These enumerate all the registers for dependence tracking.

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71 const int FramePointerReg = 30;
72
73 const int ArgumentReg[] = {8, 9, 10, 11, 12, 13};
74 const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
75
76 // Some OS syscall use a second register (o1) to return a second value
77 const int SyscallPseudoReturnReg = ArgumentReg[1];
78
55
56 // SPARC has a delay slot
57 #define ISA_HAS_DELAY_SLOT 1
58
59 // SPARC NOP (sethi %(hi(0), g0)
60 const MachInst NoopMachInst = 0x01000000;
61
62 // These enumerate all the registers for dependence tracking.

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74 const int FramePointerReg = 30;
75
76 const int ArgumentReg[] = {8, 9, 10, 11, 12, 13};
77 const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
78
79 // Some OS syscall use a second register (o1) to return a second value
80 const int SyscallPseudoReturnReg = ArgumentReg[1];
81
79 //XXX These numbers are bogus
80 const int MaxInstSrcRegs = 8;
81 const int MaxInstDestRegs = 9;
82
83 //8K. This value is implmentation specific; and should probably
84 //be somewhere else.
85 const int LogVMPageSize = 13;
86 const int VMPageSize = (1 << LogVMPageSize);
87
88 // real address virtual mapping
89 // sort of like alpha super page, but less frequently used
90 const Addr SegKPMEnd = ULL(0xfffffffc00000000);

--- 39 unchanged lines hidden --- 		82 //8K. This value is implmentation specific; and should probably
83 //be somewhere else.
84 const int LogVMPageSize = 13;
85 const int VMPageSize = (1 << LogVMPageSize);
86
87 // real address virtual mapping
88 // sort of like alpha super page, but less frequently used
89 const Addr SegKPMEnd = ULL(0xfffffffc00000000);

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