isa_traits.hh (4103:785279436bdd) isa_traits.hh (4641:7bfba41846c2)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 44 unchanged lines hidden (view full) ---

53 // SPARC has a delay slot
54 #define ISA_HAS_DELAY_SLOT 1
55
56 // SPARC NOP (sethi %(hi(0), g0)
57 const MachInst NoopMachInst = 0x01000000;
58
59 // These enumerate all the registers for dependence tracking.
60 enum DependenceTags {
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 44 unchanged lines hidden (view full) ---

53 // SPARC has a delay slot
54 #define ISA_HAS_DELAY_SLOT 1
55
56 // SPARC NOP (sethi %(hi(0), g0)
57 const MachInst NoopMachInst = 0x01000000;
58
59 // These enumerate all the registers for dependence tracking.
60 enum DependenceTags {
61 FP_Base_DepTag = 32*3+8,
61 FP_Base_DepTag = 32*3+9,
62 Ctrl_Base_DepTag = FP_Base_DepTag + 64
63 };
64
65 // semantically meaningful register indices
66 const int ZeroReg = 0; // architecturally meaningful
67 // the rest of these depend on the ABI
68 const int StackPointerReg = 14;
69 const int ReturnAddressReg = 31; // post call, precall is 15

--- 62 unchanged lines hidden --- 		62 Ctrl_Base_DepTag = FP_Base_DepTag + 64
63 };
64
65 // semantically meaningful register indices
66 const int ZeroReg = 0; // architecturally meaningful
67 // the rest of these depend on the ABI
68 const int StackPointerReg = 14;
69 const int ReturnAddressReg = 31; // post call, precall is 15

--- 62 unchanged lines hidden ---