1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 18 unchanged lines hidden (view full) --- 27 * 28 * Authors: Gabe Black 29 */ 30 31#ifndef __ARCH_SPARC_ISA_TRAITS_HH__ 32#define __ARCH_SPARC_ISA_TRAITS_HH__ 33 34#include "arch/sparc/types.hh" |
35#include "arch/sparc/sparc_traits.hh" |
36#include "config/full_system.hh" |
37 |
38class StaticInstPtr; 39 40namespace BigEndianGuest {} 41 42#if FULL_SYSTEM 43#include "arch/sparc/isa_fullsys_traits.hh" 44#endif 45 --- 5 unchanged lines hidden (view full) --- 51 using namespace BigEndianGuest; 52 53 // SPARC has a delay slot 54 #define ISA_HAS_DELAY_SLOT 1 55 56 // SPARC NOP (sethi %(hi(0), g0) 57 const MachInst NoopMachInst = 0x01000000; 58 |
59 // These enumerate all the registers for dependence tracking. 60 enum DependenceTags { |
61 FP_Base_DepTag = 33, 62 Ctrl_Base_DepTag = 97, |
63 }; 64 |
65 // semantically meaningful register indices 66 const int ZeroReg = 0; // architecturally meaningful 67 // the rest of these depend on the ABI 68 const int StackPointerReg = 14; 69 const int ReturnAddressReg = 31; // post call, precall is 15 70 const int ReturnValueReg = 8; // Post return, 24 is pre-return. 71 const int FramePointerReg = 30; 72 const int ArgumentReg0 = 8; --- 15 unchanged lines hidden (view full) --- 88 const int VMPageSize = (1 << LogVMPageSize); 89 90 //Why does both the previous set of constants and this one exist? 91 const int PageShift = 13; 92 const int PageBytes = ULL(1) << PageShift; 93 94 const int BranchPredAddrShiftAmt = 2; 95 |
96 StaticInstPtr decodeInst(ExtMachInst); |
97} 98 99#endif // __ARCH_SPARC_ISA_TRAITS_HH__ |