operands.isa (3952:092d03b2ab95) | operands.isa (3993:ec94c9911337) |
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1// Copyright (c) 2006 The Regents of The University of Michigan | 1// Copyright (c) 2006-2007 The Regents of The University of Michigan |
2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright 9// notice, this list of conditions and the following disclaimer in the --- 73 unchanged lines hidden (view full) --- 83 'Frd_0': ('FloatReg', 'df', 'dfpr(RD)', 'IsFloating', 10), 84 'Frd_1': ('FloatReg', 'df', 'dfpr(RD) + 2', 'IsFloating', 10), 85 'Frd_2': ('FloatReg', 'df', 'dfpr(RD) + 4', 'IsFloating', 10), 86 'Frd_3': ('FloatReg', 'df', 'dfpr(RD) + 6', 'IsFloating', 10), 87 'Frd_4': ('FloatReg', 'df', 'dfpr(RD) + 8', 'IsFloating', 10), 88 'Frd_5': ('FloatReg', 'df', 'dfpr(RD) + 10', 'IsFloating', 10), 89 'Frd_6': ('FloatReg', 'df', 'dfpr(RD) + 12', 'IsFloating', 10), 90 'Frd_7': ('FloatReg', 'df', 'dfpr(RD) + 14', 'IsFloating', 10), | 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright 9// notice, this list of conditions and the following disclaimer in the --- 73 unchanged lines hidden (view full) --- 83 'Frd_0': ('FloatReg', 'df', 'dfpr(RD)', 'IsFloating', 10), 84 'Frd_1': ('FloatReg', 'df', 'dfpr(RD) + 2', 'IsFloating', 10), 85 'Frd_2': ('FloatReg', 'df', 'dfpr(RD) + 4', 'IsFloating', 10), 86 'Frd_3': ('FloatReg', 'df', 'dfpr(RD) + 6', 'IsFloating', 10), 87 'Frd_4': ('FloatReg', 'df', 'dfpr(RD) + 8', 'IsFloating', 10), 88 'Frd_5': ('FloatReg', 'df', 'dfpr(RD) + 10', 'IsFloating', 10), 89 'Frd_6': ('FloatReg', 'df', 'dfpr(RD) + 12', 'IsFloating', 10), 90 'Frd_7': ('FloatReg', 'df', 'dfpr(RD) + 14', 'IsFloating', 10), |
91 'Frs1s': ('FloatReg', 'df', 'RS1', 'IsFloating', 11), | 91 'Frs1s': ('FloatReg', 'sf', 'RS1', 'IsFloating', 11), |
92 'Frs1': ('FloatReg', 'df', 'dfpr(RS1)', 'IsFloating', 11), | 92 'Frs1': ('FloatReg', 'df', 'dfpr(RS1)', 'IsFloating', 11), |
93 'Frs2s': ('FloatReg', 'df', 'RS2', 'IsFloating', 12), | 93 'Frs2s': ('FloatReg', 'sf', 'RS2', 'IsFloating', 12), |
94 'Frs2': ('FloatReg', 'df', 'dfpr(RS2)', 'IsFloating', 12), 95 'NPC': ('NPC', 'udw', None, ( None, None, 'IsControl' ), 31), 96 'NNPC': ('NNPC', 'udw', None, (None, None, 'IsControl' ), 32), 97 # Registers which are used explicitly in instructions 98 'R0': ('IntReg', 'udw', '0', None, 6), 99 'R1': ('IntReg', 'udw', '1', None, 7), 100 'R15': ('IntReg', 'udw', '15', 'IsInteger', 8), 101 'R16': ('IntReg', 'udw', '16', None, 9), --- 53 unchanged lines hidden --- | 94 'Frs2': ('FloatReg', 'df', 'dfpr(RS2)', 'IsFloating', 12), 95 'NPC': ('NPC', 'udw', None, ( None, None, 'IsControl' ), 31), 96 'NNPC': ('NNPC', 'udw', None, (None, None, 'IsControl' ), 32), 97 # Registers which are used explicitly in instructions 98 'R0': ('IntReg', 'udw', '0', None, 6), 99 'R1': ('IntReg', 'udw', '1', None, 7), 100 'R15': ('IntReg', 'udw', '15', 'IsInteger', 8), 101 'R16': ('IntReg', 'udw', '16', None, 9), --- 53 unchanged lines hidden --- |