priv.isa (3792:dae368e56d0e) priv.isa (5094:10b8551e3e3f)
1// Copyright (c) 2006 The Regents of The University of Michigan
1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright
9// notice, this list of conditions and the following disclaimer in the

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202 {
203 %(op_decl)s;
204 %(op_rd)s;
205
206 //If the processor isn't in privileged mode, fault out right away
207 if(%(check)s)
208 return new PrivilegedAction;
209
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright
9// notice, this list of conditions and the following disclaimer in the

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202 {
203 %(op_decl)s;
204 %(op_rd)s;
205
206 //If the processor isn't in privileged mode, fault out right away
207 if(%(check)s)
208 return new PrivilegedAction;
209
210 if(%(tlCheck)s)
211 return new IllegalInstruction;
212
210 Fault fault = NoFault;
211 %(code)s;
212 %(op_wb)s;
213 return fault;
214 }
215}};
216
217let {{
213 Fault fault = NoFault;
214 %(code)s;
215 %(op_wb)s;
216 return fault;
217 }
218}};
219
220let {{
218 def doPrivFormat(code, checkCode, name, Name, opt_flags):
221 def doPrivFormat(code, checkCode, name, Name, tlCheck, opt_flags):
219 (usesImm, code, immCode,
220 rString, iString) = splitOutImm(code)
221 #If these are rd, rdpr, rdhpr, wr, wrpr, or wrhpr instructions,
222 #cut any other info out of the mnemonic. Also pick a different
223 #base class.
224 regBase = 'Priv'
225 regName = ''
226 for mnem in ["rdhpr", "rdpr", "rd"]:

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231 break
232 for mnem in ["wrhpr", "wrpr", "wr"]:
233 if name.startswith(mnem):
234 regName = name[len(mnem):]
235 name = mnem
236 regBase = 'WrPriv'
237 break
238 iop = InstObjParams(name, Name, regBase,
222 (usesImm, code, immCode,
223 rString, iString) = splitOutImm(code)
224 #If these are rd, rdpr, rdhpr, wr, wrpr, or wrhpr instructions,
225 #cut any other info out of the mnemonic. Also pick a different
226 #base class.
227 regBase = 'Priv'
228 regName = ''
229 for mnem in ["rdhpr", "rdpr", "rd"]:

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234 break
235 for mnem in ["wrhpr", "wrpr", "wr"]:
236 if name.startswith(mnem):
237 regName = name[len(mnem):]
238 name = mnem
239 regBase = 'WrPriv'
240 break
241 iop = InstObjParams(name, Name, regBase,
239 {"code": code, "check": checkCode, "reg_name": regName},
242 {"code": code, "check": checkCode,
243 "tlCheck": tlCheck, "reg_name": regName},
240 opt_flags)
241 header_output = BasicDeclare.subst(iop)
242 if regName == '':
243 decoder_output = BasicConstructor.subst(iop)
244 else:
245 decoder_output = ControlRegConstructor.subst(iop)
246 exec_output = PrivExecute.subst(iop)
247 if usesImm:
248 imm_iop = InstObjParams(name, Name + 'Imm', regBase + 'Imm',
244 opt_flags)
245 header_output = BasicDeclare.subst(iop)
246 if regName == '':
247 decoder_output = BasicConstructor.subst(iop)
248 else:
249 decoder_output = ControlRegConstructor.subst(iop)
250 exec_output = PrivExecute.subst(iop)
251 if usesImm:
252 imm_iop = InstObjParams(name, Name + 'Imm', regBase + 'Imm',
249 {"code": immCode, "check": checkCode, "reg_name": regName},
253 {"code": immCode, "check": checkCode,
254 "tlCheck": tlCheck, "reg_name": regName},
250 opt_flags)
251 header_output += BasicDeclare.subst(imm_iop)
252 if regName == '':
253 decoder_output += BasicConstructor.subst(imm_iop)
254 else:
255 decoder_output += ControlRegConstructor.subst(imm_iop)
256 exec_output += PrivExecute.subst(imm_iop)
257 decode_block = ROrImmDecode.subst(iop)
258 else:
259 decode_block = BasicDecode.subst(iop)
260 return (header_output, decoder_output, exec_output, decode_block)
261}};
262
255 opt_flags)
256 header_output += BasicDeclare.subst(imm_iop)
257 if regName == '':
258 decoder_output += BasicConstructor.subst(imm_iop)
259 else:
260 decoder_output += ControlRegConstructor.subst(imm_iop)
261 exec_output += PrivExecute.subst(imm_iop)
262 decode_block = ROrImmDecode.subst(iop)
263 else:
264 decode_block = BasicDecode.subst(iop)
265 return (header_output, decoder_output, exec_output, decode_block)
266}};
267
263def format Priv(code, *opt_flags) {{
264 checkCode = "!(Pstate<2:> || Hpstate<2:>)"
268def format Priv(code, extraCond=true, checkTl=false, *opt_flags) {{
269 checkCode = "(%s) && !(Pstate<2:> || Hpstate<2:>)" % extraCond
270 if checkTl != "false":
271 tlCheck = "Tl == 0"
272 else:
273 tlCheck = "false"
265 (header_output, decoder_output,
266 exec_output, decode_block) = doPrivFormat(code,
274 (header_output, decoder_output,
275 exec_output, decode_block) = doPrivFormat(code,
267 checkCode, name, Name, opt_flags)
276 checkCode, name, Name, tlCheck, opt_flags)
268}};
269
277}};
278
270def format NoPriv(code, *opt_flags) {{
279def format NoPriv(code, checkTl=false, *opt_flags) {{
271 #Instructions which use this format don't really check for
272 #any particular mode, but the disassembly is performed
273 #using the control registers actual name
274 checkCode = "false"
280 #Instructions which use this format don't really check for
281 #any particular mode, but the disassembly is performed
282 #using the control registers actual name
283 checkCode = "false"
284 if checkTl != "false":
285 tlCheck = "Tl == 0"
286 else:
287 tlCheck = "false"
275 (header_output, decoder_output,
276 exec_output, decode_block) = doPrivFormat(code,
288 (header_output, decoder_output,
289 exec_output, decode_block) = doPrivFormat(code,
277 checkCode, name, Name, opt_flags)
290 checkCode, name, Name, tlCheck, opt_flags)
278}};
279
291}};
292
280def format PrivCheck(code, extraCheckCode, *opt_flags) {{
281 checkCode = "(%s) && !(Pstate<2:> || Hpstate<2:>)" % extraCheckCode
282 (header_output, decoder_output,
283 exec_output, decode_block) = doPrivFormat(code,
284 checkCode, name, Name, opt_flags)
285}};
286
287def format HPriv(code, *opt_flags) {{
293def format HPriv(code, checkTl=false, *opt_flags) {{
288 checkCode = "!Hpstate<2:2>"
294 checkCode = "!Hpstate<2:2>"
295 if checkTl != "false":
296 tlCheck = "Tl == 0"
297 else:
298 tlCheck = "false"
289 (header_output, decoder_output,
290 exec_output, decode_block) = doPrivFormat(code,
299 (header_output, decoder_output,
300 exec_output, decode_block) = doPrivFormat(code,
291 checkCode, name, Name, opt_flags)
301 checkCode, name, Name, tlCheck, opt_flags)
292}};
293
302}};
303