priv.isa (3418:50e5c0cb3186) priv.isa (3587:841cf134f321)
1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright
9// notice, this list of conditions and the following disclaimer in the
10// documentation and/or other materials provided with the distribution;
11// neither the name of the copyright holders nor the names of its
12// contributors may be used to endorse or promote products derived from
13// this software without specific prior written permission.
14//
15// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26//
27// Authors: Ali Saidi
28// Gabe Black
29// Steve Reinhardt
30
31////////////////////////////////////////////////////////////////////
32//
33// Privilege mode instructions
34//
35
36output header {{
37 /**
38 * Base class for privelege mode operations.
39 */
40 class Priv : public SparcStaticInst
41 {
42 protected:
43 // Constructor
44 Priv(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
45 SparcStaticInst(mnem, _machInst, __opClass)
46 {
47 }
48
49 std::string generateDisassembly(Addr pc,
50 const SymbolTable *symtab) const;
51 };
52
53 /**
54 * Base class for privelege mode operations with immediates.
55 */
56 class PrivImm : public Priv
57 {
58 protected:
59 // Constructor
60 PrivImm(const char *mnem, ExtMachInst _machInst,
61 OpClass __opClass) :
62 Priv(mnem, _machInst, __opClass), imm(SIMM13)
63 {
64 }
65
66 int32_t imm;
67 };
68
69}};
70
71output decoder {{
72 std::string Priv::generateDisassembly(Addr pc,
73 const SymbolTable *symtab) const
74 {
75 std::stringstream response;
76
77 printMnemonic(response, mnemonic);
78
79 return response.str();
80 }
81}};
82
83def template PrivExecute {{
84 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
85 Trace::InstRecord *traceData) const
86 {
87 %(op_decl)s;
88 %(op_rd)s;
89
90 //If the processor isn't in privileged mode, fault out right away
91 if(%(check)s)
92 return new PrivilegedAction;
93
94 Fault fault = NoFault;
95 %(code)s;
96 %(op_wb)s;
97 return fault;
98 }
99}};
100
101let {{
102 def doPrivFormat(code, checkCode, name, Name, opt_flags):
103 (usesImm, code, immCode,
104 rString, iString) = splitOutImm(code)
105 iop = InstObjParams(name, Name, 'Priv', code,
106 opt_flags, {"check": checkCode})
107 header_output = BasicDeclare.subst(iop)
108 decoder_output = BasicConstructor.subst(iop)
109 exec_output = PrivExecute.subst(iop)
110 if usesImm:
111 imm_iop = InstObjParams(name, Name + 'Imm', 'PrivImm',
112 immCode, opt_flags, {"check": checkCode})
113 header_output += BasicDeclare.subst(imm_iop)
114 decoder_output += BasicConstructor.subst(imm_iop)
115 exec_output += PrivExecute.subst(imm_iop)
116 decode_block = ROrImmDecode.subst(iop)
117 else:
118 decode_block = BasicDecode.subst(iop)
119 return (header_output, decoder_output, exec_output, decode_block)
120}};
121
1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright
9// notice, this list of conditions and the following disclaimer in the
10// documentation and/or other materials provided with the distribution;
11// neither the name of the copyright holders nor the names of its
12// contributors may be used to endorse or promote products derived from
13// this software without specific prior written permission.
14//
15// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26//
27// Authors: Ali Saidi
28// Gabe Black
29// Steve Reinhardt
30
31////////////////////////////////////////////////////////////////////
32//
33// Privilege mode instructions
34//
35
36output header {{
37 /**
38 * Base class for privelege mode operations.
39 */
40 class Priv : public SparcStaticInst
41 {
42 protected:
43 // Constructor
44 Priv(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
45 SparcStaticInst(mnem, _machInst, __opClass)
46 {
47 }
48
49 std::string generateDisassembly(Addr pc,
50 const SymbolTable *symtab) const;
51 };
52
53 /**
54 * Base class for privelege mode operations with immediates.
55 */
56 class PrivImm : public Priv
57 {
58 protected:
59 // Constructor
60 PrivImm(const char *mnem, ExtMachInst _machInst,
61 OpClass __opClass) :
62 Priv(mnem, _machInst, __opClass), imm(SIMM13)
63 {
64 }
65
66 int32_t imm;
67 };
68
69}};
70
71output decoder {{
72 std::string Priv::generateDisassembly(Addr pc,
73 const SymbolTable *symtab) const
74 {
75 std::stringstream response;
76
77 printMnemonic(response, mnemonic);
78
79 return response.str();
80 }
81}};
82
83def template PrivExecute {{
84 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
85 Trace::InstRecord *traceData) const
86 {
87 %(op_decl)s;
88 %(op_rd)s;
89
90 //If the processor isn't in privileged mode, fault out right away
91 if(%(check)s)
92 return new PrivilegedAction;
93
94 Fault fault = NoFault;
95 %(code)s;
96 %(op_wb)s;
97 return fault;
98 }
99}};
100
101let {{
102 def doPrivFormat(code, checkCode, name, Name, opt_flags):
103 (usesImm, code, immCode,
104 rString, iString) = splitOutImm(code)
105 iop = InstObjParams(name, Name, 'Priv', code,
106 opt_flags, {"check": checkCode})
107 header_output = BasicDeclare.subst(iop)
108 decoder_output = BasicConstructor.subst(iop)
109 exec_output = PrivExecute.subst(iop)
110 if usesImm:
111 imm_iop = InstObjParams(name, Name + 'Imm', 'PrivImm',
112 immCode, opt_flags, {"check": checkCode})
113 header_output += BasicDeclare.subst(imm_iop)
114 decoder_output += BasicConstructor.subst(imm_iop)
115 exec_output += PrivExecute.subst(imm_iop)
116 decode_block = ROrImmDecode.subst(iop)
117 else:
118 decode_block = BasicDecode.subst(iop)
119 return (header_output, decoder_output, exec_output, decode_block)
120}};
121
122// Primary format for integer operate instructions:
123def format Priv(code, *opt_flags) {{
122def format Priv(code, *opt_flags) {{
124 checkCode = "!(Pstate<2:2> || Hpstate<2:2>)"
123 checkCode = "!(Pstate<2:> || Hpstate<2:>)"
125 (header_output, decoder_output,
126 exec_output, decode_block) = doPrivFormat(code,
124 (header_output, decoder_output,
125 exec_output, decode_block) = doPrivFormat(code,
127 checkCode, name, Name, opt_flags + ('IprAccessOp',))
126 checkCode, name, Name, opt_flags)
128}};
129
127}};
128
129def format NoPriv(code, *opt_flags) {{
130 #Instructions which use this format don't really check for
131 #any particular mode, but the disassembly is performed
132 #using the control registers actual name
133 checkCode = "false"
134 (header_output, decoder_output,
135 exec_output, decode_block) = doPrivFormat(code,
136 checkCode, name, Name, opt_flags)
137}};
138
139def format PrivCheck(code, extraCheckCode, *opt_flags) {{
140 checkCode = "(%s) && !(Pstate<2:> || Hpstate<2:>)" % extraCheckCode
141 (header_output, decoder_output,
142 exec_output, decode_block) = doPrivFormat(code,
143 checkCode, name, Name, opt_flags)
144}};
145
130def format HPriv(code, *opt_flags) {{
131 checkCode = "!Hpstate<2:2>"
132 (header_output, decoder_output,
133 exec_output, decode_block) = doPrivFormat(code,
146def format HPriv(code, *opt_flags) {{
147 checkCode = "!Hpstate<2:2>"
148 (header_output, decoder_output,
149 exec_output, decode_block) = doPrivFormat(code,
134 checkCode, name, Name, opt_flags + ('IprAccessOp',))
150 checkCode, name, Name, opt_flags)
135}};
136
151}};
152