1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright
9// notice, this list of conditions and the following disclaimer in the
10// documentation and/or other materials provided with the distribution;
11// neither the name of the copyright holders nor the names of its
12// contributors may be used to endorse or promote products derived from
13// this software without specific prior written permission.
14//
15// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26//
27// Authors: Ali Saidi
28// Gabe Black
29// Steve Reinhardt
30
31////////////////////////////////////////////////////////////////////
32//
33// Privilege mode instructions
34//
35
36output header {{
37 /**
38 * Base class for privelege mode operations.
39 */
40 class Priv : public SparcStaticInst
41 {
42 protected:
43 // Constructor
44 Priv(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
45 SparcStaticInst(mnem, _machInst, __opClass)
46 {
47 }
48
49 std::string generateDisassembly(Addr pc,
50 const SymbolTable *symtab) const;
51 };
52
53 /**
54 * Base class for privelege mode operations with immediates.
55 */
56 class PrivImm : public Priv
57 {
58 protected:
59 // Constructor
60 PrivImm(const char *mnem, ExtMachInst _machInst,
61 OpClass __opClass) :
62 Priv(mnem, _machInst, __opClass), imm(SIMM13)
63 {
64 }
65
66 int32_t imm;
67 };
68
69}};
70
71output decoder {{
72 std::string Priv::generateDisassembly(Addr pc,
73 const SymbolTable *symtab) const
74 {
75 return "Privileged Instruction";
76 }
77}};
78
79def template PrivExecute {{
80 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
81 Trace::InstRecord *traceData) const
82 {
83 %(op_decl)s;
84 %(op_rd)s;
85
86 //If the processor isn't in privileged mode, fault out right away
87 if(%(check)s)
88 return new PrivilegedAction;
89
| 1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright
9// notice, this list of conditions and the following disclaimer in the
10// documentation and/or other materials provided with the distribution;
11// neither the name of the copyright holders nor the names of its
12// contributors may be used to endorse or promote products derived from
13// this software without specific prior written permission.
14//
15// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26//
27// Authors: Ali Saidi
28// Gabe Black
29// Steve Reinhardt
30
31////////////////////////////////////////////////////////////////////
32//
33// Privilege mode instructions
34//
35
36output header {{
37 /**
38 * Base class for privelege mode operations.
39 */
40 class Priv : public SparcStaticInst
41 {
42 protected:
43 // Constructor
44 Priv(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
45 SparcStaticInst(mnem, _machInst, __opClass)
46 {
47 }
48
49 std::string generateDisassembly(Addr pc,
50 const SymbolTable *symtab) const;
51 };
52
53 /**
54 * Base class for privelege mode operations with immediates.
55 */
56 class PrivImm : public Priv
57 {
58 protected:
59 // Constructor
60 PrivImm(const char *mnem, ExtMachInst _machInst,
61 OpClass __opClass) :
62 Priv(mnem, _machInst, __opClass), imm(SIMM13)
63 {
64 }
65
66 int32_t imm;
67 };
68
69}};
70
71output decoder {{
72 std::string Priv::generateDisassembly(Addr pc,
73 const SymbolTable *symtab) const
74 {
75 return "Privileged Instruction";
76 }
77}};
78
79def template PrivExecute {{
80 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
81 Trace::InstRecord *traceData) const
82 {
83 %(op_decl)s;
84 %(op_rd)s;
85
86 //If the processor isn't in privileged mode, fault out right away
87 if(%(check)s)
88 return new PrivilegedAction;
89
|
| 90 Fault fault = NoFault;
|
90 %(code)s;
91 %(op_wb)s;
| 91 %(code)s;
92 %(op_wb)s;
|
92 return NoFault;
| 93 return fault;
|
93 }
94}};
95
96let {{
97 def doPrivFormat(code, checkCode, name, Name, opt_flags):
98 (usesImm, code, immCode,
99 rString, iString) = splitOutImm(code)
100 iop = InstObjParams(name, Name, 'Priv', code,
101 opt_flags, ("check", checkCode))
102 header_output = BasicDeclare.subst(iop)
103 decoder_output = BasicConstructor.subst(iop)
104 exec_output = PrivExecute.subst(iop)
105 if usesImm:
106 imm_iop = InstObjParams(name, Name + 'Imm', 'PrivImm',
107 immCode, opt_flags, ("check", checkCode))
108 header_output += BasicDeclare.subst(imm_iop)
109 decoder_output += BasicConstructor.subst(imm_iop)
110 exec_output += PrivExecute.subst(imm_iop)
111 decode_block = ROrImmDecode.subst(iop)
112 else:
113 decode_block = BasicDecode.subst(iop)
114 return (header_output, decoder_output, exec_output, decode_block)
115}};
116
117// Primary format for integer operate instructions:
118def format Priv(code, *opt_flags) {{
| 94 }
95}};
96
97let {{
98 def doPrivFormat(code, checkCode, name, Name, opt_flags):
99 (usesImm, code, immCode,
100 rString, iString) = splitOutImm(code)
101 iop = InstObjParams(name, Name, 'Priv', code,
102 opt_flags, ("check", checkCode))
103 header_output = BasicDeclare.subst(iop)
104 decoder_output = BasicConstructor.subst(iop)
105 exec_output = PrivExecute.subst(iop)
106 if usesImm:
107 imm_iop = InstObjParams(name, Name + 'Imm', 'PrivImm',
108 immCode, opt_flags, ("check", checkCode))
109 header_output += BasicDeclare.subst(imm_iop)
110 decoder_output += BasicConstructor.subst(imm_iop)
111 exec_output += PrivExecute.subst(imm_iop)
112 decode_block = ROrImmDecode.subst(iop)
113 else:
114 decode_block = BasicDecode.subst(iop)
115 return (header_output, decoder_output, exec_output, decode_block)
116}};
117
118// Primary format for integer operate instructions:
119def format Priv(code, *opt_flags) {{
|
119 checkCode = "((xc->readMiscReg(PrStart + MISCREG_PSTATE))<2:2>)"
| 120 checkCode = '''((xc->readMiscReg(PrStart + MISCREG_PSTATE))<2:2>) ||
121 ((xc->readMiscReg(HprStart + MISCREG_HPSTATE))<2:2>)'''
|
120 (header_output, decoder_output,
121 exec_output, decode_block) = doPrivFormat(code,
122 checkCode, name, Name, opt_flags)
123}};
124
| 122 (header_output, decoder_output,
123 exec_output, decode_block) = doPrivFormat(code,
124 checkCode, name, Name, opt_flags)
125}};
126
|
| 127def format HPriv(code, *opt_flags) {{
128 checkCode = "((xc->readMiscReg(HprStart + MISCREG_HPSTATE))<2:2>)"
129 (header_output, decoder_output,
130 exec_output, decode_block) = doPrivFormat(code,
131 checkCode, name, Name, opt_flags)
132}};
|
125
| 133
|