util.isa (4224:7e828583f2cb) util.isa (4648:173a212f5091)
1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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144 %(fp_enable_check)s;
145 %(op_decl)s;
146 %(op_rd)s;
147 %(ea_code)s;
148 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
149 %(fault_check)s;
150 if(fault == NoFault)
151 {
1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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144 %(fp_enable_check)s;
145 %(op_decl)s;
146 %(op_rd)s;
147 %(ea_code)s;
148 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
149 %(fault_check)s;
150 if(fault == NoFault)
151 {
152 %(EA_trunc)s
152 fault = xc->read(EA, (%(mem_acc_type)s%(mem_acc_size)s_t&)Mem, %(asi_val)s);
153 }
154 if(fault == NoFault)
155 {
156 %(code)s;
157 }
158 if(fault == NoFault)
159 {

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174 %(fp_enable_check)s;
175 %(op_decl)s;
176 %(op_rd)s;
177 %(ea_code)s;
178 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
179 %(fault_check)s;
180 if(fault == NoFault)
181 {
153 fault = xc->read(EA, (%(mem_acc_type)s%(mem_acc_size)s_t&)Mem, %(asi_val)s);
154 }
155 if(fault == NoFault)
156 {
157 %(code)s;
158 }
159 if(fault == NoFault)
160 {

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175 %(fp_enable_check)s;
176 %(op_decl)s;
177 %(op_rd)s;
178 %(ea_code)s;
179 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
180 %(fault_check)s;
181 if(fault == NoFault)
182 {
183 %(EA_trunc)s
182 fault = xc->read(EA, (%(mem_acc_type)s%(mem_acc_size)s_t&)Mem, %(asi_val)s);
183 }
184 return fault;
185 }
186}};
187
188def template LoadCompleteAcc {{
189 Fault %(class_name)s::completeAcc(PacketPtr pkt, %(CPU_exec_context)s * xc,

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219 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
220 %(fault_check)s;
221 if(fault == NoFault)
222 {
223 %(code)s;
224 }
225 if(storeCond && fault == NoFault)
226 {
184 fault = xc->read(EA, (%(mem_acc_type)s%(mem_acc_size)s_t&)Mem, %(asi_val)s);
185 }
186 return fault;
187 }
188}};
189
190def template LoadCompleteAcc {{
191 Fault %(class_name)s::completeAcc(PacketPtr pkt, %(CPU_exec_context)s * xc,

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221 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
222 %(fault_check)s;
223 if(fault == NoFault)
224 {
225 %(code)s;
226 }
227 if(storeCond && fault == NoFault)
228 {
229 %(EA_trunc)s
227 fault = xc->write((%(mem_acc_type)s%(mem_acc_size)s_t)Mem,
228 EA, %(asi_val)s, 0);
229 }
230 if(fault == NoFault)
231 {
232 //Write the resulting state to the execution context
233 %(op_wb)s;
234 }

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252 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
253 %(fault_check)s;
254 if(fault == NoFault)
255 {
256 %(code)s;
257 }
258 if(storeCond && fault == NoFault)
259 {
230 fault = xc->write((%(mem_acc_type)s%(mem_acc_size)s_t)Mem,
231 EA, %(asi_val)s, 0);
232 }
233 if(fault == NoFault)
234 {
235 //Write the resulting state to the execution context
236 %(op_wb)s;
237 }

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255 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
256 %(fault_check)s;
257 if(fault == NoFault)
258 {
259 %(code)s;
260 }
261 if(storeCond && fault == NoFault)
262 {
263 %(EA_trunc)s
260 fault = xc->write((%(mem_acc_type)s%(mem_acc_size)s_t)Mem,
261 EA, %(asi_val)s, 0);
262 }
263 if(fault == NoFault)
264 {
265 //Write the resulting state to the execution context
266 %(op_wb)s;
267 }

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312 AlternateASIPrivFaultCheck = '''
313 if(!bits(Pstate,2,2) && !bits(Hpstate,2,2) && !AsiIsUnPriv((ASI)EXT_ASI) ||
314 !bits(Hpstate,2,2) && AsiIsHPriv((ASI)EXT_ASI))
315 fault = new PrivilegedAction;
316 else if(AsiIsAsIfUser((ASI)EXT_ASI) && !bits(Pstate,2,2))
317 fault = new PrivilegedAction;
318 '''
319
264 fault = xc->write((%(mem_acc_type)s%(mem_acc_size)s_t)Mem,
265 EA, %(asi_val)s, 0);
266 }
267 if(fault == NoFault)
268 {
269 //Write the resulting state to the execution context
270 %(op_wb)s;
271 }

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316 AlternateASIPrivFaultCheck = '''
317 if(!bits(Pstate,2,2) && !bits(Hpstate,2,2) && !AsiIsUnPriv((ASI)EXT_ASI) ||
318 !bits(Hpstate,2,2) && AsiIsHPriv((ASI)EXT_ASI))
319 fault = new PrivilegedAction;
320 else if(AsiIsAsIfUser((ASI)EXT_ASI) && !bits(Pstate,2,2))
321 fault = new PrivilegedAction;
322 '''
323
324 TruncateEA = '''
325#if !FULL_SYSTEM
326 EA = Pstate<3:> ? EA<31:0> : EA;
327#endif
328 '''
320}};
321
322//A simple function to generate the name of the macro op of a certain
323//instruction at a certain micropc
324let {{
325 def makeMicroName(name, microPc):
326 return name + "::" + name + "_" + str(microPc)
327}};

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341
342 def doDualSplitExecute(code, postacc_code, eaRegCode, eaImmCode, execute,
343 faultCode, nameReg, nameImm, NameReg, NameImm, asi, opt_flags):
344 executeCode = ''
345 for (eaCode, name, Name) in (
346 (eaRegCode, nameReg, NameReg),
347 (eaImmCode, nameImm, NameImm)):
348 microParams = {"code": code, "postacc_code" : postacc_code,
329}};
330
331//A simple function to generate the name of the macro op of a certain
332//instruction at a certain micropc
333let {{
334 def makeMicroName(name, microPc):
335 return name + "::" + name + "_" + str(microPc)
336}};

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350
351 def doDualSplitExecute(code, postacc_code, eaRegCode, eaImmCode, execute,
352 faultCode, nameReg, nameImm, NameReg, NameImm, asi, opt_flags):
353 executeCode = ''
354 for (eaCode, name, Name) in (
355 (eaRegCode, nameReg, NameReg),
356 (eaImmCode, nameImm, NameImm)):
357 microParams = {"code": code, "postacc_code" : postacc_code,
349 "ea_code": eaCode, "fault_check": faultCode}
358 "ea_code": eaCode, "fault_check": faultCode,
359 "EA_trunc" : TruncateEA}
350 executeCode += doSplitExecute(execute, name, Name,
351 asi, opt_flags, microParams)
352 return executeCode
353}};
360 executeCode += doSplitExecute(execute, name, Name,
361 asi, opt_flags, microParams)
362 return executeCode
363}};