util.isa (3980:9bcb2a2e9bb8) util.isa (4040:eb894f3fc168)
1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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144 %(fp_enable_check)s;
145 %(op_decl)s;
146 %(op_rd)s;
147 %(ea_code)s;
148 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
149 %(fault_check)s;
150 if(fault == NoFault)
151 {
1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

--- 135 unchanged lines hidden (view full) ---

144 %(fp_enable_check)s;
145 %(op_decl)s;
146 %(op_rd)s;
147 %(ea_code)s;
148 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
149 %(fault_check)s;
150 if(fault == NoFault)
151 {
152 fault = xc->read(EA, (uint%(mem_acc_size)s_t&)Mem, %(asi_val)s);
152 fault = xc->read(EA, (%(mem_acc_type)s%(mem_acc_size)s_t&)Mem, %(asi_val)s);
153 }
154 if(fault == NoFault)
155 {
156 %(code)s;
157 }
158 if(fault == NoFault)
159 {
160 //Write the resulting state to the execution context

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174 %(fp_enable_check)s;
175 %(op_decl)s;
176 %(op_rd)s;
177 %(ea_code)s;
178 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
179 %(fault_check)s;
180 if(fault == NoFault)
181 {
153 }
154 if(fault == NoFault)
155 {
156 %(code)s;
157 }
158 if(fault == NoFault)
159 {
160 //Write the resulting state to the execution context

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174 %(fp_enable_check)s;
175 %(op_decl)s;
176 %(op_rd)s;
177 %(ea_code)s;
178 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
179 %(fault_check)s;
180 if(fault == NoFault)
181 {
182 fault = xc->read(EA, (uint%(mem_acc_size)s_t&)Mem, %(asi_val)s);
182 fault = xc->read(EA, (%(mem_acc_type)s%(mem_acc_size)s_t&)Mem, %(asi_val)s);
183 }
184 return fault;
185 }
186}};
187
188def template LoadCompleteAcc {{
189 Fault %(class_name)s::completeAcc(PacketPtr pkt, %(CPU_exec_context)s * xc,
190 Trace::InstRecord * traceData) const

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241 Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc,
242 Trace::InstRecord * traceData) const
243 {
244 Fault fault = NoFault;
245 bool storeCond = true;
246 Addr EA;
247 %(fp_enable_check)s;
248 %(op_decl)s;
183 }
184 return fault;
185 }
186}};
187
188def template LoadCompleteAcc {{
189 Fault %(class_name)s::completeAcc(PacketPtr pkt, %(CPU_exec_context)s * xc,
190 Trace::InstRecord * traceData) const

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241 Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc,
242 Trace::InstRecord * traceData) const
243 {
244 Fault fault = NoFault;
245 bool storeCond = true;
246 Addr EA;
247 %(fp_enable_check)s;
248 %(op_decl)s;
249
249 %(op_rd)s;
250 %(ea_code)s;
251 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
252 %(fault_check)s;
253 if(fault == NoFault)
254 {
255 %(code)s;
256 }

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285def template CompleteAccDeclare {{
286 Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const;
287}};
288
289//Here are some code snippets which check for various fault conditions
290let {{
291 LoadFuncs = [LoadExecute, LoadInitiateAcc, LoadCompleteAcc]
292 StoreFuncs = [StoreExecute, StoreInitiateAcc, StoreCompleteAcc]
250 %(op_rd)s;
251 %(ea_code)s;
252 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
253 %(fault_check)s;
254 if(fault == NoFault)
255 {
256 %(code)s;
257 }

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286def template CompleteAccDeclare {{
287 Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const;
288}};
289
290//Here are some code snippets which check for various fault conditions
291let {{
292 LoadFuncs = [LoadExecute, LoadInitiateAcc, LoadCompleteAcc]
293 StoreFuncs = [StoreExecute, StoreInitiateAcc, StoreCompleteAcc]
294
293 # The LSB can be zero, since it's really the MSB in doubles and quads
294 # and we're dealing with doubles
295 BlockAlignmentFaultCheck = '''
296 if(RD & 0xe)
297 fault = new IllegalInstruction;
298 else if(EA & 0x3f)
299 fault = new MemAddressNotAligned;
300 '''

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332let {{
333 def doSplitExecute(execute, name, Name, asi, opt_flags, microParam):
334 microParam["asi_val"] = asi;
335 iop = InstObjParams(name, Name, '', microParam, opt_flags)
336 (execf, initf, compf) = execute
337 return execf.subst(iop) + initf.subst(iop) + compf.subst(iop)
338
339
295 # The LSB can be zero, since it's really the MSB in doubles and quads
296 # and we're dealing with doubles
297 BlockAlignmentFaultCheck = '''
298 if(RD & 0xe)
299 fault = new IllegalInstruction;
300 else if(EA & 0x3f)
301 fault = new MemAddressNotAligned;
302 '''

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334let {{
335 def doSplitExecute(execute, name, Name, asi, opt_flags, microParam):
336 microParam["asi_val"] = asi;
337 iop = InstObjParams(name, Name, '', microParam, opt_flags)
338 (execf, initf, compf) = execute
339 return execf.subst(iop) + initf.subst(iop) + compf.subst(iop)
340
341
340 def doDualSplitExecute(code, eaRegCode, eaImmCode, execute,
342 def doDualSplitExecute(code, postacc_code, eaRegCode, eaImmCode, execute,
341 faultCode, nameReg, nameImm, NameReg, NameImm, asi, opt_flags):
342 executeCode = ''
343 for (eaCode, name, Name) in (
344 (eaRegCode, nameReg, NameReg),
345 (eaImmCode, nameImm, NameImm)):
343 faultCode, nameReg, nameImm, NameReg, NameImm, asi, opt_flags):
344 executeCode = ''
345 for (eaCode, name, Name) in (
346 (eaRegCode, nameReg, NameReg),
347 (eaImmCode, nameImm, NameImm)):
346 microParams = {"code": code, "ea_code": eaCode,
347 "fault_check": faultCode}
348 microParams = {"code": code, "postacc_code" : postacc_code,
349 "ea_code": eaCode, "fault_check": faultCode}
348 executeCode += doSplitExecute(execute, name, Name,
349 asi, opt_flags, microParams)
350 return executeCode
351}};
350 executeCode += doSplitExecute(execute, name, Name,
351 asi, opt_flags, microParams)
352 return executeCode
353}};