util.isa (3952:092d03b2ab95) util.isa (3954:d689b611d9dc)
1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

--- 156 unchanged lines hidden (view full) ---

165}};
166
167def template LoadInitiateAcc {{
168 Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc,
169 Trace::InstRecord * traceData) const
170 {
171 Fault fault = NoFault;
172 Addr EA;
1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

--- 156 unchanged lines hidden (view full) ---

165}};
166
167def template LoadInitiateAcc {{
168 Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc,
169 Trace::InstRecord * traceData) const
170 {
171 Fault fault = NoFault;
172 Addr EA;
173 uint%(mem_acc_size)s_t Mem;
174 %(op_decl)s;
175 %(op_rd)s;
176 %(ea_code)s;
177 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
178 %(fault_check)s;
179 if(fault == NoFault)
180 {
181 fault = xc->read(EA, (uint%(mem_acc_size)s_t&)Mem, %(asi_val)s);

--- 108 unchanged lines hidden (view full) ---

290 # The LSB can be zero, since it's really the MSB in doubles and quads
291 # and we're dealing with doubles
292 BlockAlignmentFaultCheck = '''
293 if(RD & 0xe)
294 fault = new IllegalInstruction;
295 else if(EA & 0x3f)
296 fault = new MemAddressNotAligned;
297 '''
173 %(op_decl)s;
174 %(op_rd)s;
175 %(ea_code)s;
176 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
177 %(fault_check)s;
178 if(fault == NoFault)
179 {
180 fault = xc->read(EA, (uint%(mem_acc_size)s_t&)Mem, %(asi_val)s);

--- 108 unchanged lines hidden (view full) ---

289 # The LSB can be zero, since it's really the MSB in doubles and quads
290 # and we're dealing with doubles
291 BlockAlignmentFaultCheck = '''
292 if(RD & 0xe)
293 fault = new IllegalInstruction;
294 else if(EA & 0x3f)
295 fault = new MemAddressNotAligned;
296 '''
298 TwinAlignmentFaultCheck = '''
299 if(RD & 0xe)
300 fault = new IllegalInstruction;
301 else if(EA & 0x1f)
302 fault = new MemAddressNotAligned;
303 '''
304 # XXX Need to take care of pstate.hpriv as well. The lower ASIs
305 # are split into ones that are available in priv and hpriv, and
306 # those that are only available in hpriv
307 AlternateASIPrivFaultCheck = '''
308 if(!bits(Pstate,2,2) && !bits(Hpstate,2,2) && !AsiIsUnPriv((ASI)EXT_ASI) ||
309 !bits(Hpstate,2,2) && AsiIsHPriv((ASI)EXT_ASI))
310 fault = new PrivilegedAction;
311 else if(AsiIsAsIfUser((ASI)EXT_ASI) && !bits(Pstate,2,2))

--- 37 unchanged lines hidden --- 		297 # XXX Need to take care of pstate.hpriv as well. The lower ASIs
298 # are split into ones that are available in priv and hpriv, and
299 # those that are only available in hpriv
300 AlternateASIPrivFaultCheck = '''
301 if(!bits(Pstate,2,2) && !bits(Hpstate,2,2) && !AsiIsUnPriv((ASI)EXT_ASI) ||
302 !bits(Hpstate,2,2) && AsiIsHPriv((ASI)EXT_ASI))
303 fault = new PrivilegedAction;
304 else if(AsiIsAsIfUser((ASI)EXT_ASI) && !bits(Pstate,2,2))

--- 37 unchanged lines hidden ---