Cross Reference: /gem5/src/arch/sparc/isa/formats/mem/util.isa

1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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76 {
77 std::stringstream response;
78 bool load = flags[IsLoad];
79 bool save = flags[IsStore];
80
81 printMnemonic(response, mnemonic);
82 if(save)
83 {

84 printReg(response, _srcRegIdx[0]);

85 ccprintf(response, ", ");
86 }
87 ccprintf(response, "[ ");
88 printReg(response, _srcRegIdx[!save ? 0 : 1]);
89 ccprintf(response, " + ");
90 printReg(response, _srcRegIdx[!save ? 1 : 2]);
91 ccprintf(response, " ]");
92 if(load)
93 {
94 ccprintf(response, ", ");

95 printReg(response, _destRegIdx[0]);

96 }
97
98 return response.str();
99 }
100
101 std::string MemImm::generateDisassembly(Addr pc,
102 const SymbolTable *symtab) const
103 {
104 std::stringstream response;
105 bool load = flags[IsLoad];
106 bool save = flags[IsStore];
107
108 printMnemonic(response, mnemonic);
109 if(save)
110 {

111 printReg(response, _srcRegIdx[0]);

112 ccprintf(response, ", ");
113 }
114 ccprintf(response, "[ ");
115 printReg(response, _srcRegIdx[!save ? 0 : 1]);
116 if(imm >= 0)
117 ccprintf(response, " + 0x%x ]", imm);
118 else
119 ccprintf(response, " + -0x%x ]", -imm);
120 if(load)
121 {
122 ccprintf(response, ", ");

123 printReg(response, _destRegIdx[0]);

124 }
125
126 return response.str();
127 }
128}};
129
130//This template provides the execute functions for a load
131def template LoadExecute {{

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144 fault = xc->read(EA, (uint%(mem_acc_size)s_t&)Mem, 0);
145 }
146 if(fault == NoFault)
147 {
148 %(code)s;
149 }
150 if(fault == NoFault)
151 {

152 //Write the resulting state to the execution context
153 %(op_wb)s;

154 }
155
156 return fault;
157 }
158
159 Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc,
160 Trace::InstRecord * traceData) const
161 {

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210 %(code)s;
211 }
212 if(storeCond && fault == NoFault)
213 {
214 fault = xc->write((uint%(mem_acc_size)s_t)Mem, EA, 0, &write_result);
215 }
216 if(fault == NoFault)
217 {

218 //Write the resulting state to the execution context
219 %(op_wb)s;

220 }
221
222 return fault;
223 }
224
225 Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc,
226 Trace::InstRecord * traceData) const
227 {

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239 %(code)s;
240 }
241 if(storeCond && fault == NoFault)
242 {
243 fault = xc->write((uint%(mem_acc_size)s_t)Mem, EA, 0, &write_result);
244 }
245 if(fault == NoFault)
246 {

247 //Write the resulting state to the execution context

248 %(op_wb)s;
249 }
250 return fault;
251 }
252
253 Fault %(class_name)s::completeAcc(PacketPtr, %(CPU_exec_context)s * xc,
254 Trace::InstRecord * traceData) const
255 {

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288 '''
289
290}};
291
292//A simple function to generate the name of the macro op of a certain
293//instruction at a certain micropc
294let {{
295 def makeMicroName(name, microPc):

296 return name + "::" + name + "_" + str(microPc)

297}};
298
299//This function properly generates the execute functions for one of the
300//templates above. This is needed because in one case, ea computation,
301//fault checks and the actual code all occur in the same function,
302//and in the other they're distributed across two. Also note that for
303//execute functions, the name of the base class doesn't matter.
304let {{

305 def doSplitExecute(code, eaCode, execute,
306 faultCode, name, Name, opt_flags):
307 codeIop = InstObjParams(name, Name, '', code, opt_flags)
308 eaIop = InstObjParams(name, Name, '', eaCode,
309 opt_flags, {"fault_check": faultCode})
310 iop = InstObjParams(name, Name, '', code, opt_flags,
311 {"fault_check": faultCode, "ea_code" : eaCode})

305 def doSplitExecute(code, execute, name, Name, opt_flags, microParam):
306 codeParam = microParam.copy()
307 codeParam["ea_code"] = ''
308 codeIop = InstObjParams(name, Name, '', code, opt_flags, codeParam)
309 eaIop = InstObjParams(name, Name, '', microParam["ea_code"],
310 opt_flags, microParam)
311 iop = InstObjParams(name, Name, '', code, opt_flags, microParam)

312 (iop.ea_decl,
313 iop.ea_rd,
314 iop.ea_wb) = (eaIop.op_decl, eaIop.op_rd, eaIop.op_wb)
315 (iop.code_decl,
316 iop.code_rd,
317 iop.code_wb) = (codeIop.op_decl, codeIop.op_rd, codeIop.op_wb)
318 return execute.subst(iop)
319
320
321 def doDualSplitExecute(code, eaRegCode, eaImmCode, execute,
322 faultCode, nameReg, nameImm, NameReg, NameImm, opt_flags):
323 executeCode = ''
324 for (eaCode, name, Name) in (
325 (eaRegCode, nameReg, NameReg),
326 (eaImmCode, nameImm, NameImm)):

327 executeCode += doSplitExecute(code, eaCode,
328 execute, faultCode, name, Name, opt_flags)

327 microParams = {"ea_code" : eaCode, "fault_check": faultCode}
328 executeCode += doSplitExecute(code, execute, name, Name,
329 opt_flags, microParams)