swap.isa (8342:77d12d8f7971) | swap.isa (8442:b1f3dfae06f1) |
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1// Copyright (c) 2007 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 36 unchanged lines hidden (view full) --- 45 %(ea_code)s; 46 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA); 47 %(fault_check)s; 48 if (fault == NoFault) { 49 %(code)s; 50 } 51 if (storeCond && fault == NoFault) { 52 %(EA_trunc)s | 1// Copyright (c) 2007 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 36 unchanged lines hidden (view full) --- 45 %(ea_code)s; 46 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA); 47 %(fault_check)s; 48 if (fault == NoFault) { 49 %(code)s; 50 } 51 if (storeCond && fault == NoFault) { 52 %(EA_trunc)s |
53 fault = xc->write((uint%(mem_acc_size)s_t)Mem, 54 EA, %(asi_val)s, &mem_data); | 53 fault = writeMemAtomic(xc, traceData, Mem, EA, 54 %(asi_val)s, &mem_data); |
55 } 56 if (fault == NoFault) { 57 // Handle the swapping 58 %(postacc_code)s; 59 } 60 if (fault == NoFault) { 61 // Write the resulting state to the execution context 62 %(op_wb)s; --- 19 unchanged lines hidden (view full) --- 82 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA); 83 %(fault_check)s; 84 85 if (fault == NoFault) { 86 %(code)s; 87 } 88 if (fault == NoFault) { 89 %(EA_trunc)s | 55 } 56 if (fault == NoFault) { 57 // Handle the swapping 58 %(postacc_code)s; 59 } 60 if (fault == NoFault) { 61 // Write the resulting state to the execution context 62 %(op_wb)s; --- 19 unchanged lines hidden (view full) --- 82 DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA); 83 %(fault_check)s; 84 85 if (fault == NoFault) { 86 %(code)s; 87 } 88 if (fault == NoFault) { 89 %(EA_trunc)s |
90 fault = xc->write((uint%(mem_acc_size)s_t)Mem, 91 EA, %(asi_val)s, &mem_data); | 90 fault = writeMemTiming(xc, traceData, Mem, EA, %(asi_val)s, 91 &mem_data); |
92 } 93 return fault; 94 } 95}}; 96 97 98 99def template SwapCompleteAcc {{ 100 Fault %(class_name)s::completeAcc(PacketPtr pkt, %(CPU_exec_context)s * xc, 101 Trace::InstRecord * traceData) const 102 { 103 Fault fault = NoFault; 104 %(op_decl)s; 105 | 92 } 93 return fault; 94 } 95}}; 96 97 98 99def template SwapCompleteAcc {{ 100 Fault %(class_name)s::completeAcc(PacketPtr pkt, %(CPU_exec_context)s * xc, 101 Trace::InstRecord * traceData) const 102 { 103 Fault fault = NoFault; 104 %(op_decl)s; 105 |
106 uint64_t mem_data = pkt->get<uint%(mem_acc_size)s_t>(); | 106 getMem(pkt, Mem, traceData); 107 uint64_t mem_data = Mem; |
107 108 if (fault == NoFault) { 109 // Handle the swapping 110 %(postacc_code)s; 111 } 112 if (fault == NoFault) { 113 // Write the resulting state to the execution context 114 %(op_wb)s; --- 68 unchanged lines hidden --- | 108 109 if (fault == NoFault) { 110 // Handle the swapping 111 %(postacc_code)s; 112 } 113 if (fault == NoFault) { 114 // Write the resulting state to the execution context 115 %(op_wb)s; --- 68 unchanged lines hidden --- |