blockmem.isa (3949:b6664282d899) | blockmem.isa (3952:092d03b2ab95) |
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1// Copyright (c) 2006 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 77 unchanged lines hidden (view full) --- 86 87 std::string generateDisassembly(Addr pc, 88 const SymbolTable *symtab) const; 89 90 const int32_t imm; 91 }; 92}}; 93 | 1// Copyright (c) 2006 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 77 unchanged lines hidden (view full) --- 86 87 std::string generateDisassembly(Addr pc, 88 const SymbolTable *symtab) const; 89 90 const int32_t imm; 91 }; 92}}; 93 |
94output header {{ 95 96 class TwinMem : public SparcMacroInst 97 { 98 protected: 99 100 // Constructor 101 // We make the assumption that all block memory operations 102 // Will take 8 instructions to execute 103 TwinMem(const char *mnem, ExtMachInst _machInst) : 104 SparcMacroInst(mnem, _machInst, No_OpClass, 8) 105 {} 106 }; 107 108 class TwinMemImm : public BlockMem 109 { 110 protected: 111 112 // Constructor 113 TwinMemImm(const char *mnem, ExtMachInst _machInst) : 114 BlockMem(mnem, _machInst) 115 {} 116 }; 117 118 class TwinMemMicro : public SparcMicroInst 119 { 120 protected: 121 122 // Constructor 123 TwinMemMicro(const char *mnem, ExtMachInst _machInst, 124 OpClass __opClass, int8_t _offset) : 125 SparcMicroInst(mnem, _machInst, __opClass), 126 offset(_offset) 127 {} 128 129 std::string generateDisassembly(Addr pc, 130 const SymbolTable *symtab) const; 131 132 const int8_t offset; 133 }; 134 135 class TwinMemImmMicro : public BlockMemMicro 136 { 137 protected: 138 139 // Constructor 140 TwinMemImmMicro(const char *mnem, ExtMachInst _machInst, 141 OpClass __opClass, int8_t _offset) : 142 BlockMemMicro(mnem, _machInst, __opClass, _offset), 143 imm(sext<13>(SIMM13)) 144 {} 145 146 std::string generateDisassembly(Addr pc, 147 const SymbolTable *symtab) const; 148 149 const int32_t imm; 150 }; 151}}; 152 |
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94output decoder {{ 95 std::string BlockMemMicro::generateDisassembly(Addr pc, 96 const SymbolTable *symtab) const 97 { 98 std::stringstream response; 99 bool load = flags[IsLoad]; 100 bool save = flags[IsStore]; 101 --- 42 unchanged lines hidden (view full) --- 144 printReg(response, _destRegIdx[0]); 145 } 146 147 return response.str(); 148 } 149 150}}; 151 | 153output decoder {{ 154 std::string BlockMemMicro::generateDisassembly(Addr pc, 155 const SymbolTable *symtab) const 156 { 157 std::stringstream response; 158 bool load = flags[IsLoad]; 159 bool save = flags[IsStore]; 160 --- 42 unchanged lines hidden (view full) --- 203 printReg(response, _destRegIdx[0]); 204 } 205 206 return response.str(); 207 } 208 209}}; 210 |
211output decoder {{ 212 std::string TwinMemMicro::generateDisassembly(Addr pc, 213 const SymbolTable *symtab) const 214 { 215 std::stringstream response; 216 bool load = flags[IsLoad]; 217 bool save = flags[IsStore]; 218 219 printMnemonic(response, mnemonic); 220 if(save) 221 { 222 printReg(response, _srcRegIdx[0]); 223 ccprintf(response, ", "); 224 } 225 ccprintf(response, "[ "); 226 printReg(response, _srcRegIdx[!save ? 0 : 1]); 227 ccprintf(response, " + "); 228 printReg(response, _srcRegIdx[!save ? 1 : 2]); 229 ccprintf(response, " ]"); 230 if(load) 231 { 232 ccprintf(response, ", "); 233 printReg(response, _destRegIdx[0]); 234 } 235 236 return response.str(); 237 } 238 239 std::string TwinMemImmMicro::generateDisassembly(Addr pc, 240 const SymbolTable *symtab) const 241 { 242 std::stringstream response; 243 bool load = flags[IsLoad]; 244 bool save = flags[IsStore]; 245 246 printMnemonic(response, mnemonic); 247 if(save) 248 { 249 printReg(response, _srcRegIdx[1]); 250 ccprintf(response, ", "); 251 } 252 ccprintf(response, "[ "); 253 printReg(response, _srcRegIdx[0]); 254 if(imm >= 0) 255 ccprintf(response, " + 0x%x ]", imm); 256 else 257 ccprintf(response, " + -0x%x ]", -imm); 258 if(load) 259 { 260 ccprintf(response, ", "); 261 printReg(response, _destRegIdx[0]); 262 } 263 264 return response.str(); 265 } 266 267}}; 268 |
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152def template BlockMemDeclare {{ 153 /** 154 * Static instruction class for a block memory operation 155 */ 156 class %(class_name)s : public %(base_class)s 157 { 158 public: 159 //Constructor --- 77 unchanged lines hidden (view full) --- 237 %(class_name)s_7(ExtMachInst machInst); 238 %(BasicExecDeclare)s 239 %(InitiateAccDeclare)s 240 %(CompleteAccDeclare)s 241 }; 242 }; 243}}; 244 | 269def template BlockMemDeclare {{ 270 /** 271 * Static instruction class for a block memory operation 272 */ 273 class %(class_name)s : public %(base_class)s 274 { 275 public: 276 //Constructor --- 77 unchanged lines hidden (view full) --- 354 %(class_name)s_7(ExtMachInst machInst); 355 %(BasicExecDeclare)s 356 %(InitiateAccDeclare)s 357 %(CompleteAccDeclare)s 358 }; 359 }; 360}}; 361 |
362def template TwinMemDeclare {{ 363 /** 364 * Static instruction class for a block memory operation 365 */ 366 class %(class_name)s : public %(base_class)s 367 { 368 public: 369 //Constructor 370 %(class_name)s(ExtMachInst machInst); 371 372 protected: 373 class %(class_name)s_0 : public %(base_class)sMicro 374 { 375 public: 376 //Constructor 377 %(class_name)s_0(ExtMachInst machInst); 378 %(BasicExecDeclare)s 379 %(InitiateAccDeclare)s 380 %(CompleteAccDeclare)s 381 }; 382 383 class %(class_name)s_1 : public %(base_class)sMicro 384 { 385 public: 386 //Constructor 387 %(class_name)s_1(ExtMachInst machInst); 388 %(BasicExecDeclare)s 389 %(InitiateAccDeclare)s 390 %(CompleteAccDeclare)s 391 }; 392 }; 393}}; 394 |
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245// Basic instruction class constructor template. 246def template BlockMemConstructor {{ 247 inline %(class_name)s::%(class_name)s(ExtMachInst machInst) 248 : %(base_class)s("%(mnemonic)s", machInst) 249 { 250 %(constructor)s; 251 microOps[0] = new %(class_name)s_0(machInst); 252 microOps[1] = new %(class_name)s_1(machInst); 253 microOps[2] = new %(class_name)s_2(machInst); 254 microOps[3] = new %(class_name)s_3(machInst); 255 microOps[4] = new %(class_name)s_4(machInst); 256 microOps[5] = new %(class_name)s_5(machInst); 257 microOps[6] = new %(class_name)s_6(machInst); 258 microOps[7] = new %(class_name)s_7(machInst); 259 } 260}}; 261 | 395// Basic instruction class constructor template. 396def template BlockMemConstructor {{ 397 inline %(class_name)s::%(class_name)s(ExtMachInst machInst) 398 : %(base_class)s("%(mnemonic)s", machInst) 399 { 400 %(constructor)s; 401 microOps[0] = new %(class_name)s_0(machInst); 402 microOps[1] = new %(class_name)s_1(machInst); 403 microOps[2] = new %(class_name)s_2(machInst); 404 microOps[3] = new %(class_name)s_3(machInst); 405 microOps[4] = new %(class_name)s_4(machInst); 406 microOps[5] = new %(class_name)s_5(machInst); 407 microOps[6] = new %(class_name)s_6(machInst); 408 microOps[7] = new %(class_name)s_7(machInst); 409 } 410}}; 411 |
412// Basic instruction class constructor template. 413def template TwinMemConstructor {{ 414 inline %(class_name)s::%(class_name)s(ExtMachInst machInst) 415 : %(base_class)s("%(mnemonic)s", machInst) 416 { 417 %(constructor)s; 418 microOps[0] = new %(class_name)s_0(machInst); 419 microOps[1] = new %(class_name)s_1(machInst); 420 } 421}}; 422 |
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262def template BlockMemMicroConstructor {{ 263 inline %(class_name)s:: 264 %(class_name)s_%(micro_pc)s:: 265 %(class_name)s_%(micro_pc)s(ExtMachInst machInst) : 266 %(base_class)sMicro("%(mnemonic)s[%(micro_pc)s]", 267 machInst, %(op_class)s, %(micro_pc)s * 8) 268 { 269 %(constructor)s; --- 37 unchanged lines hidden (view full) --- 307 pcedCode, addrCalcReg, addrCalcImm, execute, faultCode, 308 makeMicroName(name, microPc), 309 makeMicroName(name + "Imm", microPc), 310 makeMicroName(Name, microPc), 311 makeMicroName(Name + "Imm", microPc), 312 asi, opt_flags); 313 faultCode = '' 314 return (header_output, decoder_output, exec_output, decode_block) | 423def template BlockMemMicroConstructor {{ 424 inline %(class_name)s:: 425 %(class_name)s_%(micro_pc)s:: 426 %(class_name)s_%(micro_pc)s(ExtMachInst machInst) : 427 %(base_class)sMicro("%(mnemonic)s[%(micro_pc)s]", 428 machInst, %(op_class)s, %(micro_pc)s * 8) 429 { 430 %(constructor)s; --- 37 unchanged lines hidden (view full) --- 468 pcedCode, addrCalcReg, addrCalcImm, execute, faultCode, 469 makeMicroName(name, microPc), 470 makeMicroName(name + "Imm", microPc), 471 makeMicroName(Name, microPc), 472 makeMicroName(Name + "Imm", microPc), 473 asi, opt_flags); 474 faultCode = '' 475 return (header_output, decoder_output, exec_output, decode_block) |
476 477 478 def doTwinLoadFormat(code, faultCode, name, Name, asi, opt_flags): 479 addrCalcReg = 'EA = Rs1 + Rs2 + offset;' 480 addrCalcImm = 'EA = Rs1 + imm + offset;' 481 iop = InstObjParams(name, Name, 'TwinMem', code, opt_flags) 482 iop_imm = InstObjParams(name, Name + 'Imm', 'TwinMemImm', code, opt_flags) 483 header_output = TwinMemDeclare.subst(iop) + TwinMemDeclare.subst(iop_imm) 484 decoder_output = TwinMemConstructor.subst(iop) + TwinMemConstructor.subst(iop_imm) 485 decode_block = ROrImmDecode.subst(iop) 486 matcher = re.compile(r'RdTwin') 487 exec_output = '' 488 for microPc in range(2): 489 flag_code = '' 490 pcedCode = '' 491 if (microPc == 1): 492 flag_code = "flags[IsLastMicroOp] = true;" 493 pcedCode = matcher.sub("RdHigh", code) 494 else: 495 flag_code = "flags[IsDelayedCommit] = true;" 496 pcedCode = matcher.sub("RdLow", code) 497 iop = InstObjParams(name, Name, 'TwinMem', pcedCode, 498 opt_flags, {"ea_code": addrCalcReg, 499 "fault_check": faultCode, "micro_pc": microPc, 500 "set_flags": flag_code}) 501 iop_imm = InstObjParams(name, Name + 'Imm', 'TwinMemImm', pcedCode, 502 opt_flags, {"ea_code": addrCalcImm, 503 "fault_check": faultCode, "micro_pc": microPc, 504 "set_flags": flag_code}) 505 decoder_output += BlockMemMicroConstructor.subst(iop) 506 decoder_output += BlockMemMicroConstructor.subst(iop_imm) 507 exec_output += doDualSplitExecute( 508 pcedCode, addrCalcReg, addrCalcImm, LoadExecute, faultCode, 509 makeMicroName(name, microPc), 510 makeMicroName(name + "Imm", microPc), 511 makeMicroName(Name, microPc), 512 makeMicroName(Name + "Imm", microPc), 513 asi, opt_flags); 514 faultCode = '' 515 return (header_output, decoder_output, exec_output, decode_block) 516 |
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315}}; 316 317def format BlockLoad(code, asi, *opt_flags) {{ 318 # We need to make sure to check the highest priority fault last. 319 # That way, if other faults have been detected, they'll be overwritten 320 # rather than the other way around. 321 faultCode = AlternateASIPrivFaultCheck + BlockAlignmentFaultCheck 322 (header_output, --- 9 unchanged lines hidden (view full) --- 332 # rather than the other way around. 333 faultCode = AlternateASIPrivFaultCheck + BlockAlignmentFaultCheck 334 (header_output, 335 decoder_output, 336 exec_output, 337 decode_block) = doBlockMemFormat(code, faultCode, 338 StoreFuncs, name, Name, asi, opt_flags) 339}}; | 517}}; 518 519def format BlockLoad(code, asi, *opt_flags) {{ 520 # We need to make sure to check the highest priority fault last. 521 # That way, if other faults have been detected, they'll be overwritten 522 # rather than the other way around. 523 faultCode = AlternateASIPrivFaultCheck + BlockAlignmentFaultCheck 524 (header_output, --- 9 unchanged lines hidden (view full) --- 534 # rather than the other way around. 535 faultCode = AlternateASIPrivFaultCheck + BlockAlignmentFaultCheck 536 (header_output, 537 decoder_output, 538 exec_output, 539 decode_block) = doBlockMemFormat(code, faultCode, 540 StoreFuncs, name, Name, asi, opt_flags) 541}}; |
542 543def format TwinLoad(code, asi, *opt_flags) {{ 544 faultCode = AlternateASIPrivFaultCheck + TwinAlignmentFaultCheck 545 (header_output, 546 decoder_output, 547 exec_output, 548 decode_block) = doTwinLoadFormat(code, faultCode, name, Name, asi, opt_flags) 549}}; |
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