| blockmem.isa (3901:64319816e403) | blockmem.isa (3929:3640569369a5) |
|---|---|
| 1// Copyright (c) 2006-2007 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 462 unchanged lines hidden (view full) --- 471 makeMicroName(name, microPc), 472 makeMicroName(name + "Imm", microPc), 473 makeMicroName(Name, microPc), 474 makeMicroName(Name + "Imm", microPc), 475 asi, opt_flags); 476 faultCode = '' 477 return (header_output, decoder_output, exec_output, decode_block) 478 | 1// Copyright (c) 2006-2007 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 462 unchanged lines hidden (view full) --- 471 makeMicroName(name, microPc), 472 makeMicroName(name + "Imm", microPc), 473 makeMicroName(Name, microPc), 474 makeMicroName(Name + "Imm", microPc), 475 asi, opt_flags); 476 faultCode = '' 477 return (header_output, decoder_output, exec_output, decode_block) 478 |
| 479 | |
| 480 def doTwinLoadFormat(code, faultCode, name, Name, asi, opt_flags): 481 addrCalcReg = 'EA = Rs1 + Rs2 + offset;' 482 addrCalcImm = 'EA = Rs1 + imm + offset;' 483 iop = InstObjParams(name, Name, 'TwinMem', code, opt_flags) 484 iop_imm = InstObjParams(name, Name + 'Imm', 'TwinMemImm', code, opt_flags) 485 header_output = TwinMemDeclare.subst(iop) + TwinMemDeclare.subst(iop_imm) 486 decoder_output = TwinMemConstructor.subst(iop) + TwinMemConstructor.subst(iop_imm) 487 decode_block = ROrImmDecode.subst(iop) 488 matcher = re.compile(r'RdTwin') 489 exec_output = '' 490 for microPc in range(2): 491 flag_code = '' 492 pcedCode = '' 493 if (microPc == 1): 494 flag_code = "flags[IsLastMicroOp] = true;" | 479 def doTwinLoadFormat(code, faultCode, name, Name, asi, opt_flags): 480 addrCalcReg = 'EA = Rs1 + Rs2 + offset;' 481 addrCalcImm = 'EA = Rs1 + imm + offset;' 482 iop = InstObjParams(name, Name, 'TwinMem', code, opt_flags) 483 iop_imm = InstObjParams(name, Name + 'Imm', 'TwinMemImm', code, opt_flags) 484 header_output = TwinMemDeclare.subst(iop) + TwinMemDeclare.subst(iop_imm) 485 decoder_output = TwinMemConstructor.subst(iop) + TwinMemConstructor.subst(iop_imm) 486 decode_block = ROrImmDecode.subst(iop) 487 matcher = re.compile(r'RdTwin') 488 exec_output = '' 489 for microPc in range(2): 490 flag_code = '' 491 pcedCode = '' 492 if (microPc == 1): 493 flag_code = "flags[IsLastMicroOp] = true;" |
| 495 pcedCode = matcher.sub("RdHigh", code) | 494 pcedCode = "RdLow = uReg0;\n" 495 pcedCode += matcher.sub("RdHigh", code) |
| 496 else: 497 flag_code = "flags[IsDelayedCommit] = true; flags[IsFirstMicroOp] = true;" | 496 else: 497 flag_code = "flags[IsDelayedCommit] = true; flags[IsFirstMicroOp] = true;" |
| 498 pcedCode = matcher.sub("RdLow", code) | 498 pcedCode = matcher.sub("uReg0", code) |
| 499 iop = InstObjParams(name, Name, 'TwinMem', pcedCode, 500 opt_flags, {"ea_code": addrCalcReg, 501 "fault_check": faultCode, "micro_pc": microPc, 502 "set_flags": flag_code}) 503 iop_imm = InstObjParams(name, Name + 'Imm', 'TwinMemImm', pcedCode, 504 opt_flags, {"ea_code": addrCalcImm, 505 "fault_check": faultCode, "micro_pc": microPc, 506 "set_flags": flag_code}) --- 45 unchanged lines hidden --- | 499 iop = InstObjParams(name, Name, 'TwinMem', pcedCode, 500 opt_flags, {"ea_code": addrCalcReg, 501 "fault_check": faultCode, "micro_pc": microPc, 502 "set_flags": flag_code}) 503 iop_imm = InstObjParams(name, Name + 'Imm', 'TwinMemImm', pcedCode, 504 opt_flags, {"ea_code": addrCalcImm, 505 "fault_check": faultCode, "micro_pc": microPc, 506 "set_flags": flag_code}) --- 45 unchanged lines hidden --- |