blockmem.isa (3863:adf3ddd4bcde) blockmem.isa (3901:64319816e403)
1// Copyright (c) 2006 The Regents of The University of Michigan
1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright
9// notice, this list of conditions and the following disclaimer in the

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446 decoder_output = BlockMemConstructor.subst(iop) + BlockMemConstructor.subst(iop_imm)
447 decode_block = ROrImmDecode.subst(iop)
448 matcher = re.compile(r'Frd_N')
449 exec_output = ''
450 for microPc in range(8):
451 flag_code = ''
452 if (microPc == 7):
453 flag_code = "flags[IsLastMicroOp] = true;"
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright
9// notice, this list of conditions and the following disclaimer in the

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446 decoder_output = BlockMemConstructor.subst(iop) + BlockMemConstructor.subst(iop_imm)
447 decode_block = ROrImmDecode.subst(iop)
448 matcher = re.compile(r'Frd_N')
449 exec_output = ''
450 for microPc in range(8):
451 flag_code = ''
452 if (microPc == 7):
453 flag_code = "flags[IsLastMicroOp] = true;"
454 elif (microPc == 0):
455 flag_code = "flags[IsDelayedCommit] = true; flags[IsFirstMicroOp] = true;"
454 else:
455 flag_code = "flags[IsDelayedCommit] = true;"
456 pcedCode = matcher.sub("Frd_%d" % microPc, code)
457 iop = InstObjParams(name, Name, 'BlockMem', pcedCode,
458 opt_flags, {"ea_code": addrCalcReg,
459 "fault_check": faultCode, "micro_pc": microPc,
460 "set_flags": flag_code})
461 iop_imm = InstObjParams(name, Name + 'Imm', 'BlockMemImm', pcedCode,

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487 exec_output = ''
488 for microPc in range(2):
489 flag_code = ''
490 pcedCode = ''
491 if (microPc == 1):
492 flag_code = "flags[IsLastMicroOp] = true;"
493 pcedCode = matcher.sub("RdHigh", code)
494 else:
456 else:
457 flag_code = "flags[IsDelayedCommit] = true;"
458 pcedCode = matcher.sub("Frd_%d" % microPc, code)
459 iop = InstObjParams(name, Name, 'BlockMem', pcedCode,
460 opt_flags, {"ea_code": addrCalcReg,
461 "fault_check": faultCode, "micro_pc": microPc,
462 "set_flags": flag_code})
463 iop_imm = InstObjParams(name, Name + 'Imm', 'BlockMemImm', pcedCode,

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489 exec_output = ''
490 for microPc in range(2):
491 flag_code = ''
492 pcedCode = ''
493 if (microPc == 1):
494 flag_code = "flags[IsLastMicroOp] = true;"
495 pcedCode = matcher.sub("RdHigh", code)
496 else:
495 flag_code = "flags[IsDelayedCommit] = true;"
497 flag_code = "flags[IsDelayedCommit] = true; flags[IsFirstMicroOp] = true;"
496 pcedCode = matcher.sub("RdLow", code)
497 iop = InstObjParams(name, Name, 'TwinMem', pcedCode,
498 opt_flags, {"ea_code": addrCalcReg,
499 "fault_check": faultCode, "micro_pc": microPc,
500 "set_flags": flag_code})
501 iop_imm = InstObjParams(name, Name + 'Imm', 'TwinMemImm', pcedCode,
502 opt_flags, {"ea_code": addrCalcImm,
503 "fault_check": faultCode, "micro_pc": microPc,

--- 46 unchanged lines hidden --- 		498 pcedCode = matcher.sub("RdLow", code)
499 iop = InstObjParams(name, Name, 'TwinMem', pcedCode,
500 opt_flags, {"ea_code": addrCalcReg,
501 "fault_check": faultCode, "micro_pc": microPc,
502 "set_flags": flag_code})
503 iop_imm = InstObjParams(name, Name + 'Imm', 'TwinMemImm', pcedCode,
504 opt_flags, {"ea_code": addrCalcImm,
505 "fault_check": faultCode, "micro_pc": microPc,

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