blockmem.isa (3835:97b3b03865fb) blockmem.isa (3852:b91ce3d7d236)
1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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203 printReg(response, _destRegIdx[0]);
204 }
205
206 return response.str();
207 }
208
209}};
210
1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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203 printReg(response, _destRegIdx[0]);
204 }
205
206 return response.str();
207 }
208
209}};
210
211output decoder {{
212 std::string TwinMemMicro::generateDisassembly(Addr pc,
213 const SymbolTable *symtab) const
214 {
215 std::stringstream response;
216 bool load = flags[IsLoad];
217 bool save = flags[IsStore];
218
219 printMnemonic(response, mnemonic);
220 if(save)
221 {
222 printReg(response, _srcRegIdx[0]);
223 ccprintf(response, ", ");
224 }
225 ccprintf(response, "[ ");
226 printReg(response, _srcRegIdx[!save ? 0 : 1]);
227 ccprintf(response, " + ");
228 printReg(response, _srcRegIdx[!save ? 1 : 2]);
229 ccprintf(response, " ]");
230 if(load)
231 {
232 ccprintf(response, ", ");
233 printReg(response, _destRegIdx[0]);
234 }
235
236 return response.str();
237 }
238
239 std::string TwinMemImmMicro::generateDisassembly(Addr pc,
240 const SymbolTable *symtab) const
241 {
242 std::stringstream response;
243 bool load = flags[IsLoad];
244 bool save = flags[IsStore];
245
246 printMnemonic(response, mnemonic);
247 if(save)
248 {
249 printReg(response, _srcRegIdx[1]);
250 ccprintf(response, ", ");
251 }
252 ccprintf(response, "[ ");
253 printReg(response, _srcRegIdx[0]);
254 if(imm >= 0)
255 ccprintf(response, " + 0x%x ]", imm);
256 else
257 ccprintf(response, " + -0x%x ]", -imm);
258 if(load)
259 {
260 ccprintf(response, ", ");
261 printReg(response, _destRegIdx[0]);
262 }
263
264 return response.str();
265 }
266
267}};
268
211def template BlockMemDeclare {{
212 /**
213 * Static instruction class for a block memory operation
214 */
215 class %(class_name)s : public %(base_class)s
216 {
217 public:
218 //Constructor

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442 "set_flags": flag_code})
443 iop_imm = InstObjParams(name, Name + 'Imm', 'TwinMemImm', pcedCode,
444 opt_flags, {"ea_code": addrCalcImm,
445 "fault_check": faultCode, "micro_pc": microPc,
446 "set_flags": flag_code})
447 decoder_output += BlockMemMicroConstructor.subst(iop)
448 decoder_output += BlockMemMicroConstructor.subst(iop_imm)
449 exec_output += doDualSplitExecute(
269def template BlockMemDeclare {{
270 /**
271 * Static instruction class for a block memory operation
272 */
273 class %(class_name)s : public %(base_class)s
274 {
275 public:
276 //Constructor

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500 "set_flags": flag_code})
501 iop_imm = InstObjParams(name, Name + 'Imm', 'TwinMemImm', pcedCode,
502 opt_flags, {"ea_code": addrCalcImm,
503 "fault_check": faultCode, "micro_pc": microPc,
504 "set_flags": flag_code})
505 decoder_output += BlockMemMicroConstructor.subst(iop)
506 decoder_output += BlockMemMicroConstructor.subst(iop_imm)
507 exec_output += doDualSplitExecute(
450 pcedCode, addrCalcReg, addrCalcImm, execute, faultCode,
508 pcedCode, addrCalcReg, addrCalcImm, LoadExecute, faultCode,
451 makeMicroName(name, microPc),
452 makeMicroName(name + "Imm", microPc),
453 makeMicroName(Name, microPc),
454 makeMicroName(Name + "Imm", microPc),
455 asi, opt_flags);
456 faultCode = ''
457 return (header_output, decoder_output, exec_output, decode_block)
458

--- 33 unchanged lines hidden --- 		509 makeMicroName(name, microPc),
510 makeMicroName(name + "Imm", microPc),
511 makeMicroName(Name, microPc),
512 makeMicroName(Name + "Imm", microPc),
513 asi, opt_flags);
514 faultCode = ''
515 return (header_output, decoder_output, exec_output, decode_block)
516

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