blockmem.isa (3810:c2caa5f3f09f) blockmem.isa (3835:97b3b03865fb)
1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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86
87 std::string generateDisassembly(Addr pc,
88 const SymbolTable *symtab) const;
89
90 const int32_t imm;
91 };
92}};
93
1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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86
87 std::string generateDisassembly(Addr pc,
88 const SymbolTable *symtab) const;
89
90 const int32_t imm;
91 };
92}};
93
94output header {{
95
96 class TwinMem : public SparcMacroInst
97 {
98 protected:
99
100 // Constructor
101 // We make the assumption that all block memory operations
102 // Will take 8 instructions to execute
103 TwinMem(const char *mnem, ExtMachInst _machInst) :
104 SparcMacroInst(mnem, _machInst, No_OpClass, 8)
105 {}
106 };
107
108 class TwinMemImm : public BlockMem
109 {
110 protected:
111
112 // Constructor
113 TwinMemImm(const char *mnem, ExtMachInst _machInst) :
114 BlockMem(mnem, _machInst)
115 {}
116 };
117
118 class TwinMemMicro : public SparcMicroInst
119 {
120 protected:
121
122 // Constructor
123 TwinMemMicro(const char *mnem, ExtMachInst _machInst,
124 OpClass __opClass, int8_t _offset) :
125 SparcMicroInst(mnem, _machInst, __opClass),
126 offset(_offset)
127 {}
128
129 std::string generateDisassembly(Addr pc,
130 const SymbolTable *symtab) const;
131
132 const int8_t offset;
133 };
134
135 class TwinMemImmMicro : public BlockMemMicro
136 {
137 protected:
138
139 // Constructor
140 TwinMemImmMicro(const char *mnem, ExtMachInst _machInst,
141 OpClass __opClass, int8_t _offset) :
142 BlockMemMicro(mnem, _machInst, __opClass, _offset),
143 imm(sext<13>(SIMM13))
144 {}
145
146 std::string generateDisassembly(Addr pc,
147 const SymbolTable *symtab) const;
148
149 const int32_t imm;
150 };
151}};
152
94output decoder {{
95 std::string BlockMemMicro::generateDisassembly(Addr pc,
96 const SymbolTable *symtab) const
97 {
98 std::stringstream response;
99 bool load = flags[IsLoad];
100 bool save = flags[IsStore];
101

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237 %(class_name)s_7(ExtMachInst machInst);
238 %(BasicExecDeclare)s
239 %(InitiateAccDeclare)s
240 %(CompleteAccDeclare)s
241 };
242 };
243}};
244
153output decoder {{
154 std::string BlockMemMicro::generateDisassembly(Addr pc,
155 const SymbolTable *symtab) const
156 {
157 std::stringstream response;
158 bool load = flags[IsLoad];
159 bool save = flags[IsStore];
160

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296 %(class_name)s_7(ExtMachInst machInst);
297 %(BasicExecDeclare)s
298 %(InitiateAccDeclare)s
299 %(CompleteAccDeclare)s
300 };
301 };
302}};
303
304def template TwinMemDeclare {{
305 /**
306 * Static instruction class for a block memory operation
307 */
308 class %(class_name)s : public %(base_class)s
309 {
310 public:
311 //Constructor
312 %(class_name)s(ExtMachInst machInst);
313
314 protected:
315 class %(class_name)s_0 : public %(base_class)sMicro
316 {
317 public:
318 //Constructor
319 %(class_name)s_0(ExtMachInst machInst);
320 %(BasicExecDeclare)s
321 %(InitiateAccDeclare)s
322 %(CompleteAccDeclare)s
323 };
324
325 class %(class_name)s_1 : public %(base_class)sMicro
326 {
327 public:
328 //Constructor
329 %(class_name)s_1(ExtMachInst machInst);
330 %(BasicExecDeclare)s
331 %(InitiateAccDeclare)s
332 %(CompleteAccDeclare)s
333 };
334 };
335}};
336
245// Basic instruction class constructor template.
246def template BlockMemConstructor {{
247 inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
248 : %(base_class)s("%(mnemonic)s", machInst)
249 {
250 %(constructor)s;
251 microOps[0] = new %(class_name)s_0(machInst);
252 microOps[1] = new %(class_name)s_1(machInst);
253 microOps[2] = new %(class_name)s_2(machInst);
254 microOps[3] = new %(class_name)s_3(machInst);
255 microOps[4] = new %(class_name)s_4(machInst);
256 microOps[5] = new %(class_name)s_5(machInst);
257 microOps[6] = new %(class_name)s_6(machInst);
258 microOps[7] = new %(class_name)s_7(machInst);
259 }
260}};
261
337// Basic instruction class constructor template.
338def template BlockMemConstructor {{
339 inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
340 : %(base_class)s("%(mnemonic)s", machInst)
341 {
342 %(constructor)s;
343 microOps[0] = new %(class_name)s_0(machInst);
344 microOps[1] = new %(class_name)s_1(machInst);
345 microOps[2] = new %(class_name)s_2(machInst);
346 microOps[3] = new %(class_name)s_3(machInst);
347 microOps[4] = new %(class_name)s_4(machInst);
348 microOps[5] = new %(class_name)s_5(machInst);
349 microOps[6] = new %(class_name)s_6(machInst);
350 microOps[7] = new %(class_name)s_7(machInst);
351 }
352}};
353
354// Basic instruction class constructor template.
355def template TwinMemConstructor {{
356 inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
357 : %(base_class)s("%(mnemonic)s", machInst)
358 {
359 %(constructor)s;
360 microOps[0] = new %(class_name)s_0(machInst);
361 microOps[1] = new %(class_name)s_1(machInst);
362 }
363}};
364
262def template BlockMemMicroConstructor {{
263 inline %(class_name)s::
264 %(class_name)s_%(micro_pc)s::
265 %(class_name)s_%(micro_pc)s(ExtMachInst machInst) :
266 %(base_class)sMicro("%(mnemonic)s[%(micro_pc)s]",
267 machInst, %(op_class)s, %(micro_pc)s * 8)
268 {
269 %(constructor)s;

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307 pcedCode, addrCalcReg, addrCalcImm, execute, faultCode,
308 makeMicroName(name, microPc),
309 makeMicroName(name + "Imm", microPc),
310 makeMicroName(Name, microPc),
311 makeMicroName(Name + "Imm", microPc),
312 asi, opt_flags);
313 faultCode = ''
314 return (header_output, decoder_output, exec_output, decode_block)
365def template BlockMemMicroConstructor {{
366 inline %(class_name)s::
367 %(class_name)s_%(micro_pc)s::
368 %(class_name)s_%(micro_pc)s(ExtMachInst machInst) :
369 %(base_class)sMicro("%(mnemonic)s[%(micro_pc)s]",
370 machInst, %(op_class)s, %(micro_pc)s * 8)
371 {
372 %(constructor)s;

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410 pcedCode, addrCalcReg, addrCalcImm, execute, faultCode,
411 makeMicroName(name, microPc),
412 makeMicroName(name + "Imm", microPc),
413 makeMicroName(Name, microPc),
414 makeMicroName(Name + "Imm", microPc),
415 asi, opt_flags);
416 faultCode = ''
417 return (header_output, decoder_output, exec_output, decode_block)
418
419
420 def doTwinLoadFormat(code, faultCode, name, Name, asi, opt_flags):
421 addrCalcReg = 'EA = Rs1 + Rs2 + offset;'
422 addrCalcImm = 'EA = Rs1 + imm + offset;'
423 iop = InstObjParams(name, Name, 'TwinMem', code, opt_flags)
424 iop_imm = InstObjParams(name, Name + 'Imm', 'TwinMemImm', code, opt_flags)
425 header_output = TwinMemDeclare.subst(iop) + TwinMemDeclare.subst(iop_imm)
426 decoder_output = TwinMemConstructor.subst(iop) + TwinMemConstructor.subst(iop_imm)
427 decode_block = ROrImmDecode.subst(iop)
428 matcher = re.compile(r'RdTwin')
429 exec_output = ''
430 for microPc in range(2):
431 flag_code = ''
432 pcedCode = ''
433 if (microPc == 1):
434 flag_code = "flags[IsLastMicroOp] = true;"
435 pcedCode = matcher.sub("RdHigh", code)
436 else:
437 flag_code = "flags[IsDelayedCommit] = true;"
438 pcedCode = matcher.sub("RdLow", code)
439 iop = InstObjParams(name, Name, 'TwinMem', pcedCode,
440 opt_flags, {"ea_code": addrCalcReg,
441 "fault_check": faultCode, "micro_pc": microPc,
442 "set_flags": flag_code})
443 iop_imm = InstObjParams(name, Name + 'Imm', 'TwinMemImm', pcedCode,
444 opt_flags, {"ea_code": addrCalcImm,
445 "fault_check": faultCode, "micro_pc": microPc,
446 "set_flags": flag_code})
447 decoder_output += BlockMemMicroConstructor.subst(iop)
448 decoder_output += BlockMemMicroConstructor.subst(iop_imm)
449 exec_output += doDualSplitExecute(
450 pcedCode, addrCalcReg, addrCalcImm, execute, faultCode,
451 makeMicroName(name, microPc),
452 makeMicroName(name + "Imm", microPc),
453 makeMicroName(Name, microPc),
454 makeMicroName(Name + "Imm", microPc),
455 asi, opt_flags);
456 faultCode = ''
457 return (header_output, decoder_output, exec_output, decode_block)
458
315}};
316
317def format BlockLoad(code, asi, *opt_flags) {{
318 # We need to make sure to check the highest priority fault last.
319 # That way, if other faults have been detected, they'll be overwritten
320 # rather than the other way around.
321 faultCode = AlternateASIPrivFaultCheck + BlockAlignmentFaultCheck
322 (header_output,

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332 # rather than the other way around.
333 faultCode = AlternateASIPrivFaultCheck + BlockAlignmentFaultCheck
334 (header_output,
335 decoder_output,
336 exec_output,
337 decode_block) = doBlockMemFormat(code, faultCode,
338 StoreExecute, name, Name, asi, opt_flags)
339}};
459}};
460
461def format BlockLoad(code, asi, *opt_flags) {{
462 # We need to make sure to check the highest priority fault last.
463 # That way, if other faults have been detected, they'll be overwritten
464 # rather than the other way around.
465 faultCode = AlternateASIPrivFaultCheck + BlockAlignmentFaultCheck
466 (header_output,

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476 # rather than the other way around.
477 faultCode = AlternateASIPrivFaultCheck + BlockAlignmentFaultCheck
478 (header_output,
479 decoder_output,
480 exec_output,
481 decode_block) = doBlockMemFormat(code, faultCode,
482 StoreExecute, name, Name, asi, opt_flags)
483}};
484
485def format TwinLoad(code, asi, *opt_flags) {{
486 faultCode = AlternateASIPrivFaultCheck + TwinAlignmentFaultCheck
487 (header_output,
488 decoder_output,
489 exec_output,
490 decode_block) = doTwinLoadFormat(code, faultCode, name, Name, asi, opt_flags)
491}};