integerop.isa (5093:7f20bc69fda5) integerop.isa (7741:340b6f01d69b)
1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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137
138 std::string generateDisassembly(Addr pc,
139 const SymbolTable *symtab) const;
140 };
141}};
142
143def template SetHiDecode {{
144 {
1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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137
138 std::string generateDisassembly(Addr pc,
139 const SymbolTable *symtab) const;
140 };
141}};
142
143def template SetHiDecode {{
144 {
145 if(RD == 0 && IMM22 == 0)
145 if (RD == 0 && IMM22 == 0)
146 return (SparcStaticInst *)(new Nop("nop", machInst, No_OpClass));
147 else
148 return (SparcStaticInst *)(new %(class_name)s(machInst));
149 }
150}};
151
152output decoder {{
153
146 return (SparcStaticInst *)(new Nop("nop", machInst, No_OpClass));
147 else
148 return (SparcStaticInst *)(new %(class_name)s(machInst));
149 }
150}};
151
152output decoder {{
153
154 bool IntOp::printPseudoOps(std::ostream &os, Addr pc,
154 bool
155 IntOp::printPseudoOps(std::ostream &os, Addr pc,
155 const SymbolTable *symbab) const
156 {
156 const SymbolTable *symbab) const
157 {
157 if(!std::strcmp(mnemonic, "or") && _srcRegIdx[0] == 0)
158 {
158 if (!std::strcmp(mnemonic, "or") && _srcRegIdx[0] == 0) {
159 printMnemonic(os, "mov");
160 printSrcReg(os, 1);
161 ccprintf(os, ", ");
162 printDestReg(os, 0);
163 return true;
164 }
165 return false;
166 }
167
159 printMnemonic(os, "mov");
160 printSrcReg(os, 1);
161 ccprintf(os, ", ");
162 printDestReg(os, 0);
163 return true;
164 }
165 return false;
166 }
167
168 bool IntOpImm::printPseudoOps(std::ostream &os, Addr pc,
168 bool
169 IntOpImm::printPseudoOps(std::ostream &os, Addr pc,
169 const SymbolTable *symbab) const
170 {
170 const SymbolTable *symbab) const
171 {
171 if(!std::strcmp(mnemonic, "or"))
172 {
173 if(_numSrcRegs > 0 && _srcRegIdx[0] == 0)
174 {
175 if(imm == 0)
172 if (!std::strcmp(mnemonic, "or")) {
173 if (_numSrcRegs > 0 && _srcRegIdx[0] == 0) {
174 if (imm == 0) {
176 printMnemonic(os, "clr");
175 printMnemonic(os, "clr");
177 else
178 {
176 } else {
179 printMnemonic(os, "mov");
180 ccprintf(os, " 0x%x, ", imm);
181 }
182 printDestReg(os, 0);
183 return true;
177 printMnemonic(os, "mov");
178 ccprintf(os, " 0x%x, ", imm);
179 }
180 printDestReg(os, 0);
181 return true;
184 }
185 else if(imm == 0)
186 {
182 } else if (imm == 0) {
187 printMnemonic(os, "mov");
188 printSrcReg(os, 0);
189 ccprintf(os, ", ");
190 printDestReg(os, 0);
191 return true;
192 }
193 }
194 return false;
195 }
196
183 printMnemonic(os, "mov");
184 printSrcReg(os, 0);
185 ccprintf(os, ", ");
186 printDestReg(os, 0);
187 return true;
188 }
189 }
190 return false;
191 }
192
197 std::string IntOp::generateDisassembly(Addr pc,
198 const SymbolTable *symtab) const
193 std::string
194 IntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
199 {
200 std::stringstream response;
201
195 {
196 std::stringstream response;
197
202 if(printPseudoOps(response, pc, symtab))
198 if (printPseudoOps(response, pc, symtab))
203 return response.str();
204 printMnemonic(response, mnemonic);
205 printRegArray(response, _srcRegIdx, _numSrcRegs);
199 return response.str();
200 printMnemonic(response, mnemonic);
201 printRegArray(response, _srcRegIdx, _numSrcRegs);
206 if(_numDestRegs && _numSrcRegs)
202 if (_numDestRegs && _numSrcRegs)
207 response << ", ";
208 printDestReg(response, 0);
209 return response.str();
210 }
211
203 response << ", ";
204 printDestReg(response, 0);
205 return response.str();
206 }
207
212 std::string IntOpImm::generateDisassembly(Addr pc,
208 std::string
209 IntOpImm::generateDisassembly(Addr pc,
213 const SymbolTable *symtab) const
214 {
215 std::stringstream response;
216
210 const SymbolTable *symtab) const
211 {
212 std::stringstream response;
213
217 if(printPseudoOps(response, pc, symtab))
214 if (printPseudoOps(response, pc, symtab))
218 return response.str();
219 printMnemonic(response, mnemonic);
220 printRegArray(response, _srcRegIdx, _numSrcRegs);
215 return response.str();
216 printMnemonic(response, mnemonic);
217 printRegArray(response, _srcRegIdx, _numSrcRegs);
221 if(_numSrcRegs > 0)
218 if (_numSrcRegs > 0)
222 response << ", ";
223 ccprintf(response, "0x%x", imm);
219 response << ", ";
220 ccprintf(response, "0x%x", imm);
224 if(_numDestRegs > 0)
221 if (_numDestRegs > 0)
225 response << ", ";
226 printDestReg(response, 0);
227 return response.str();
228 }
229
222 response << ", ";
223 printDestReg(response, 0);
224 return response.str();
225 }
226
230 std::string SetHi::generateDisassembly(Addr pc,
231 const SymbolTable *symtab) const
227 std::string
228 SetHi::generateDisassembly(Addr pc, const SymbolTable *symtab) const
232 {
233 std::stringstream response;
234
235 printMnemonic(response, mnemonic);
236 ccprintf(response, "%%hi(0x%x), ", imm);
237 printDestReg(response, 0);
238 return response.str();
239 }

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244 Trace::InstRecord *traceData) const
245 {
246 Fault fault = NoFault;
247
248 %(op_decl)s;
249 %(op_rd)s;
250 %(code)s;
251
229 {
230 std::stringstream response;
231
232 printMnemonic(response, mnemonic);
233 ccprintf(response, "%%hi(0x%x), ", imm);
234 printDestReg(response, 0);
235 return response.str();
236 }

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241 Trace::InstRecord *traceData) const
242 {
243 Fault fault = NoFault;
244
245 %(op_decl)s;
246 %(op_rd)s;
247 %(code)s;
248
252 //Write the resulting state to the execution context
253 if(fault == NoFault)
254 {
249 // Write the resulting state to the execution context
250 if (fault == NoFault) {
255 %(cc_code)s;
256 %(op_wb)s;
257 }
258 return fault;
259 }
260}};
261
262let {{

--- 112 unchanged lines hidden --- 		251 %(cc_code)s;
252 %(op_wb)s;
253 }
254 return fault;
255 }
256}};
257
258let {{

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