integerop.isa (12234:78ece221f9f5) | integerop.isa (12295:4fc6c59aa554) |
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1// Copyright (c) 2006-2007 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 19 unchanged lines hidden (view full) --- 28// Gabe Black 29// Steve Reinhardt 30 31//////////////////////////////////////////////////////////////////// 32// 33// Integer operate instructions 34// 35 | 1// Copyright (c) 2006-2007 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 19 unchanged lines hidden (view full) --- 28// Gabe Black 29// Steve Reinhardt 30 31//////////////////////////////////////////////////////////////////// 32// 33// Integer operate instructions 34// 35 |
36output header {{ 37 /** 38 * Base class for integer operations. 39 */ 40 class IntOp : public SparcStaticInst 41 { 42 protected: 43 // Constructor 44 IntOp(const char *mnem, ExtMachInst _machInst, 45 OpClass __opClass) : 46 SparcStaticInst(mnem, _machInst, __opClass) 47 { 48 } 49 50 std::string generateDisassembly(Addr pc, 51 const SymbolTable *symtab) const; 52 53 virtual bool printPseudoOps(std::ostream &os, Addr pc, 54 const SymbolTable *symtab) const; 55 }; 56 57 /** 58 * Base class for immediate integer operations. 59 */ 60 class IntOpImm : public IntOp 61 { 62 protected: 63 // Constructor 64 IntOpImm(const char *mnem, ExtMachInst _machInst, 65 OpClass __opClass) : 66 IntOp(mnem, _machInst, __opClass) 67 { 68 } 69 70 int64_t imm; 71 72 std::string generateDisassembly(Addr pc, 73 const SymbolTable *symtab) const; 74 75 virtual bool printPseudoOps(std::ostream &os, Addr pc, 76 const SymbolTable *symtab) const; 77 }; 78 79 /** 80 * Base class for 10 bit immediate integer operations. 81 */ 82 class IntOpImm10 : public IntOpImm 83 { 84 protected: 85 // Constructor 86 IntOpImm10(const char *mnem, ExtMachInst _machInst, 87 OpClass __opClass) : 88 IntOpImm(mnem, _machInst, __opClass) 89 { 90 imm = sext<10>(SIMM10); 91 } 92 }; 93 94 /** 95 * Base class for 11 bit immediate integer operations. 96 */ 97 class IntOpImm11 : public IntOpImm 98 { 99 protected: 100 // Constructor 101 IntOpImm11(const char *mnem, ExtMachInst _machInst, 102 OpClass __opClass) : 103 IntOpImm(mnem, _machInst, __opClass) 104 { 105 imm = sext<11>(SIMM11); 106 } 107 }; 108 109 /** 110 * Base class for 13 bit immediate integer operations. 111 */ 112 class IntOpImm13 : public IntOpImm 113 { 114 protected: 115 // Constructor 116 IntOpImm13(const char *mnem, ExtMachInst _machInst, 117 OpClass __opClass) : 118 IntOpImm(mnem, _machInst, __opClass) 119 { 120 imm = sext<13>(SIMM13); 121 } 122 }; 123 124 /** 125 * Base class for sethi. 126 */ 127 class SetHi : public IntOpImm 128 { 129 protected: 130 // Constructor 131 SetHi(const char *mnem, ExtMachInst _machInst, 132 OpClass __opClass) : 133 IntOpImm(mnem, _machInst, __opClass) 134 { 135 imm = (IMM22 & 0x3FFFFF) << 10; 136 } 137 138 std::string generateDisassembly(Addr pc, 139 const SymbolTable *symtab) const; 140 }; 141}}; 142 | |
143def template SetHiDecode {{ 144 { 145 if (RD == 0 && IMM22 == 0) 146 return (SparcStaticInst *)(new Nop("nop", machInst, No_OpClass)); 147 else 148 return (SparcStaticInst *)(new %(class_name)s(machInst)); 149 } 150}}; 151 | 36def template SetHiDecode {{ 37 { 38 if (RD == 0 && IMM22 == 0) 39 return (SparcStaticInst *)(new Nop("nop", machInst, No_OpClass)); 40 else 41 return (SparcStaticInst *)(new %(class_name)s(machInst)); 42 } 43}}; 44 |
152output decoder {{ 153 154 bool 155 IntOp::printPseudoOps(std::ostream &os, Addr pc, 156 const SymbolTable *symbab) const 157 { 158 if (!std::strcmp(mnemonic, "or") && _srcRegIdx[0].index() == 0) { 159 printMnemonic(os, "mov"); 160 printSrcReg(os, 1); 161 ccprintf(os, ", "); 162 printDestReg(os, 0); 163 return true; 164 } 165 return false; 166 } 167 168 bool 169 IntOpImm::printPseudoOps(std::ostream &os, Addr pc, 170 const SymbolTable *symbab) const 171 { 172 if (!std::strcmp(mnemonic, "or")) { 173 if (_numSrcRegs > 0 && _srcRegIdx[0].index() == 0) { 174 if (imm == 0) { 175 printMnemonic(os, "clr"); 176 } else { 177 printMnemonic(os, "mov"); 178 ccprintf(os, " 0x%x, ", imm); 179 } 180 printDestReg(os, 0); 181 return true; 182 } else if (imm == 0) { 183 printMnemonic(os, "mov"); 184 printSrcReg(os, 0); 185 ccprintf(os, ", "); 186 printDestReg(os, 0); 187 return true; 188 } 189 } 190 return false; 191 } 192 193 std::string 194 IntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 195 { 196 std::stringstream response; 197 198 if (printPseudoOps(response, pc, symtab)) 199 return response.str(); 200 printMnemonic(response, mnemonic); 201 printRegArray(response, _srcRegIdx, _numSrcRegs); 202 if (_numDestRegs && _numSrcRegs) 203 response << ", "; 204 printDestReg(response, 0); 205 return response.str(); 206 } 207 208 std::string 209 IntOpImm::generateDisassembly(Addr pc, 210 const SymbolTable *symtab) const 211 { 212 std::stringstream response; 213 214 if (printPseudoOps(response, pc, symtab)) 215 return response.str(); 216 printMnemonic(response, mnemonic); 217 printRegArray(response, _srcRegIdx, _numSrcRegs); 218 if (_numSrcRegs > 0) 219 response << ", "; 220 ccprintf(response, "0x%x", imm); 221 if (_numDestRegs > 0) 222 response << ", "; 223 printDestReg(response, 0); 224 return response.str(); 225 } 226 227 std::string 228 SetHi::generateDisassembly(Addr pc, const SymbolTable *symtab) const 229 { 230 std::stringstream response; 231 232 printMnemonic(response, mnemonic); 233 ccprintf(response, "%%hi(0x%x), ", imm); 234 printDestReg(response, 0); 235 return response.str(); 236 } 237}}; 238 | |
239def template IntOpExecute {{ 240 Fault %(class_name)s::execute(ExecContext *xc, 241 Trace::InstRecord *traceData) const 242 { 243 Fault fault = NoFault; 244 245 %(op_decl)s; 246 %(op_rd)s; --- 124 unchanged lines hidden --- | 45def template IntOpExecute {{ 46 Fault %(class_name)s::execute(ExecContext *xc, 47 Trace::InstRecord *traceData) const 48 { 49 Fault fault = NoFault; 50 51 %(op_decl)s; 52 %(op_rd)s; --- 124 unchanged lines hidden --- |