1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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137
138 std::string generateDisassembly(Addr pc,
139 const SymbolTable *symtab) const;
140 };
141}};
142
143def template SetHiDecode {{
144 {
145 if(RD == 0 && IMM22 == 0)
146 return (SparcStaticInst *)(new Nop("nop", machInst, No_OpClass));
147 else
148 return (SparcStaticInst *)(new %(class_name)s(machInst));
149 }
150}};
151
152output decoder {{
153
154 bool IntOp::printPseudoOps(std::ostream &os, Addr pc,
155 const SymbolTable *symbab) const
156 {
157 if(!std::strcmp(mnemonic, "or") && _srcRegIdx[0] == 0)
158 {
159 printMnemonic(os, "mov");
160 printSrcReg(os, 1);
161 ccprintf(os, ", ");
162 printDestReg(os, 0);
163 return true;
164 }
165 return false;
166 }
167
168 bool IntOpImm::printPseudoOps(std::ostream &os, Addr pc,
169 const SymbolTable *symbab) const
170 {
171 if(!std::strcmp(mnemonic, "or"))
172 {
173 if(_numSrcRegs > 0 && _srcRegIdx[0] == 0)
174 {
175 if(imm == 0)
176 printMnemonic(os, "clr");
177 else
178 {
179 printMnemonic(os, "mov");
180 ccprintf(os, " 0x%x, ", imm);
181 }
182 printDestReg(os, 0);
183 return true;
184 }
185 else if(imm == 0)
186 {
187 printMnemonic(os, "mov");
188 printSrcReg(os, 0);
189 ccprintf(os, ", ");
190 printDestReg(os, 0);
191 return true;
192 }
193 }
194 return false;
195 }
196
197 std::string IntOp::generateDisassembly(Addr pc,
198 const SymbolTable *symtab) const
199 {
200 std::stringstream response;
201
202 if(printPseudoOps(response, pc, symtab))
203 return response.str();
204 printMnemonic(response, mnemonic);
205 printRegArray(response, _srcRegIdx, _numSrcRegs);
206 if(_numDestRegs && _numSrcRegs)
207 response << ", ";
208 printDestReg(response, 0);
209 return response.str();
210 }
211
212 std::string IntOpImm::generateDisassembly(Addr pc,
213 const SymbolTable *symtab) const
214 {
215 std::stringstream response;
216
217 if(printPseudoOps(response, pc, symtab))
218 return response.str();
219 printMnemonic(response, mnemonic);
220 printRegArray(response, _srcRegIdx, _numSrcRegs);
221 if(_numSrcRegs > 0)
222 response << ", ";
223 ccprintf(response, "0x%x", imm);
224 if(_numDestRegs > 0)
225 response << ", ";
226 printDestReg(response, 0);
227 return response.str();
228 }
229
230 std::string SetHi::generateDisassembly(Addr pc,
231 const SymbolTable *symtab) const
232 {
233 std::stringstream response;
234
235 printMnemonic(response, mnemonic);
236 ccprintf(response, "%%hi(0x%x), ", imm);
237 printDestReg(response, 0);
238 return response.str();
239 }

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244 Trace::InstRecord *traceData) const
245 {
246 Fault fault = NoFault;
247
248 %(op_decl)s;
249 %(op_rd)s;
250 %(code)s;
251
252 //Write the resulting state to the execution context
253 if(fault == NoFault)
254 {
255 %(cc_code)s;
256 %(op_wb)s;
257 }
258 return fault;
259 }
260}};
261
262let {{

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