1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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137
138 std::string generateDisassembly(Addr pc,
139 const SymbolTable *symtab) const;
140 };
141}};
142
143def template SetHiDecode {{
144 {
145 if (RD == 0 && IMM22 == 0)
146 return (SparcStaticInst *)(new Nop("nop", machInst, No_OpClass));
147 else
148 return (SparcStaticInst *)(new %(class_name)s(machInst));
149 }
150}};
151
152output decoder {{
153
154 bool
155 IntOp::printPseudoOps(std::ostream &os, Addr pc,
156 const SymbolTable *symbab) const
157 {
158 if (!std::strcmp(mnemonic, "or") && _srcRegIdx[0] == 0) {
159 printMnemonic(os, "mov");
160 printSrcReg(os, 1);
161 ccprintf(os, ", ");
162 printDestReg(os, 0);
163 return true;
164 }
165 return false;
166 }
167
168 bool
169 IntOpImm::printPseudoOps(std::ostream &os, Addr pc,
170 const SymbolTable *symbab) const
171 {
172 if (!std::strcmp(mnemonic, "or")) {
173 if (_numSrcRegs > 0 && _srcRegIdx[0] == 0) {
174 if (imm == 0) {
175 printMnemonic(os, "clr");
176 } else {
177 printMnemonic(os, "mov");
178 ccprintf(os, " 0x%x, ", imm);
179 }
180 printDestReg(os, 0);
181 return true;
182 } else if (imm == 0) {
183 printMnemonic(os, "mov");
184 printSrcReg(os, 0);
185 ccprintf(os, ", ");
186 printDestReg(os, 0);
187 return true;
188 }
189 }
190 return false;
191 }
192
193 std::string
194 IntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
195 {
196 std::stringstream response;
197
198 if (printPseudoOps(response, pc, symtab))
199 return response.str();
200 printMnemonic(response, mnemonic);
201 printRegArray(response, _srcRegIdx, _numSrcRegs);
202 if (_numDestRegs && _numSrcRegs)
203 response << ", ";
204 printDestReg(response, 0);
205 return response.str();
206 }
207
208 std::string
209 IntOpImm::generateDisassembly(Addr pc,
210 const SymbolTable *symtab) const
211 {
212 std::stringstream response;
213
214 if (printPseudoOps(response, pc, symtab))
215 return response.str();
216 printMnemonic(response, mnemonic);
217 printRegArray(response, _srcRegIdx, _numSrcRegs);
218 if (_numSrcRegs > 0)
219 response << ", ";
220 ccprintf(response, "0x%x", imm);
221 if (_numDestRegs > 0)
222 response << ", ";
223 printDestReg(response, 0);
224 return response.str();
225 }
226
227 std::string
228 SetHi::generateDisassembly(Addr pc, const SymbolTable *symtab) const
229 {
230 std::stringstream response;
231
232 printMnemonic(response, mnemonic);
233 ccprintf(response, "%%hi(0x%x), ", imm);
234 printDestReg(response, 0);
235 return response.str();
236 }

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241 Trace::InstRecord *traceData) const
242 {
243 Fault fault = NoFault;
244
245 %(op_decl)s;
246 %(op_rd)s;
247 %(code)s;
248
249 // Write the resulting state to the execution context
250 if (fault == NoFault) {
251 %(cc_code)s;
252 %(op_wb)s;
253 }
254 return fault;
255 }
256}};
257
258let {{

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