branch.isa (7720:65d338a8dba4) branch.isa (7741:340b6f01d69b)
1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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122output decoder {{
123
124 template class BranchNBits<19>;
125
126 template class BranchNBits<22>;
127
128 template class BranchNBits<30>;
129
1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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122output decoder {{
123
124 template class BranchNBits<19>;
125
126 template class BranchNBits<22>;
127
128 template class BranchNBits<30>;
129
130 std::string Branch::generateDisassembly(Addr pc,
131 const SymbolTable *symtab) const
130 std::string
131 Branch::generateDisassembly(Addr pc, const SymbolTable *symtab) const
132 {
133 std::stringstream response;
134
135 printMnemonic(response, mnemonic);
136 printRegArray(response, _srcRegIdx, _numSrcRegs);
132 {
133 std::stringstream response;
134
135 printMnemonic(response, mnemonic);
136 printRegArray(response, _srcRegIdx, _numSrcRegs);
137 if(_numDestRegs && _numSrcRegs)
137 if (_numDestRegs && _numSrcRegs)
138 response << ", ";
139 printDestReg(response, 0);
140
141 return response.str();
142 }
143
138 response << ", ";
139 printDestReg(response, 0);
140
141 return response.str();
142 }
143
144 std::string BranchImm13::generateDisassembly(Addr pc,
144 std::string
145 BranchImm13::generateDisassembly(Addr pc,
145 const SymbolTable *symtab) const
146 {
147 std::stringstream response;
148
149 printMnemonic(response, mnemonic);
150 printRegArray(response, _srcRegIdx, _numSrcRegs);
146 const SymbolTable *symtab) const
147 {
148 std::stringstream response;
149
150 printMnemonic(response, mnemonic);
151 printRegArray(response, _srcRegIdx, _numSrcRegs);
151 if(_numSrcRegs > 0)
152 if (_numSrcRegs > 0)
152 response << ", ";
153 ccprintf(response, "0x%x", imm);
154 if (_numDestRegs > 0)
155 response << ", ";
156 printDestReg(response, 0);
157
158 return response.str();
159 }
160
153 response << ", ";
154 ccprintf(response, "0x%x", imm);
155 if (_numDestRegs > 0)
156 response << ", ";
157 printDestReg(response, 0);
158
159 return response.str();
160 }
161
161 std::string BranchDisp::generateDisassembly(Addr pc,
162 std::string
163 BranchDisp::generateDisassembly(Addr pc,
162 const SymbolTable *symtab) const
163 {
164 std::stringstream response;
165 std::string symbol;
166 Addr symbolAddr;
167
168 Addr target = disp + pc;
169
170 printMnemonic(response, mnemonic);
171 ccprintf(response, "0x%x", target);
172
164 const SymbolTable *symtab) const
165 {
166 std::stringstream response;
167 std::string symbol;
168 Addr symbolAddr;
169
170 Addr target = disp + pc;
171
172 printMnemonic(response, mnemonic);
173 ccprintf(response, "0x%x", target);
174
173 if(symtab && symtab->findNearestSymbol(target, symbol, symbolAddr))
174 {
175 if (symtab &&
176 symtab->findNearestSymbol(target, symbol, symbolAddr)) {
175 ccprintf(response, " <%s", symbol);
177 ccprintf(response, " <%s", symbol);
176 if(symbolAddr != target)
178 if (symbolAddr != target)
177 ccprintf(response, "+%d>", target - symbolAddr);
178 else
179 ccprintf(response, ">");
180 }
181
182 return response.str();
183 }
184}};
185
186def template JumpExecute {{
187 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
188 Trace::InstRecord *traceData) const
189 {
179 ccprintf(response, "+%d>", target - symbolAddr);
180 else
181 ccprintf(response, ">");
182 }
183
184 return response.str();
185 }
186}};
187
188def template JumpExecute {{
189 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
190 Trace::InstRecord *traceData) const
191 {
190 //Attempt to execute the instruction
192 // Attempt to execute the instruction
191 Fault fault = NoFault;
192
193 %(op_decl)s;
194 %(op_rd)s;
195
196 PCS = PCS;
197 %(code)s;
198
193 Fault fault = NoFault;
194
195 %(op_decl)s;
196 %(op_rd)s;
197
198 PCS = PCS;
199 %(code)s;
200
199 if(fault == NoFault)
200 {
201 //Write the resulting state to the execution context
201 if (fault == NoFault) {
202 // Write the resulting state to the execution context
202 %(op_wb)s;
203 }
204
205 return fault;
206 }
207}};
208
209def template BranchExecute {{
203 %(op_wb)s;
204 }
205
206 return fault;
207 }
208}};
209
210def template BranchExecute {{
210 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
211 Fault
212 %(class_name)s::execute(%(CPU_exec_context)s *xc,
211 Trace::InstRecord *traceData) const
212 {
213 Trace::InstRecord *traceData) const
214 {
213 //Attempt to execute the instruction
215 // Attempt to execute the instruction
214 Fault fault = NoFault;
215
216 %(op_decl)s;
217 %(op_rd)s;
218
219 if (%(cond)s) {
220 %(code)s;
221 } else {
222 %(fail)s;
223 }
224
216 Fault fault = NoFault;
217
218 %(op_decl)s;
219 %(op_rd)s;
220
221 if (%(cond)s) {
222 %(code)s;
223 } else {
224 %(fail)s;
225 }
226
225 if(fault == NoFault)
226 {
227 //Write the resulting state to the execution context
227 if (fault == NoFault) {
228 // Write the resulting state to the execution context
228 %(op_wb)s;
229 }
230
231 return fault;
232 }
233}};
234
235def template BranchDecode {{

--- 114 unchanged lines hidden --- 		229 %(op_wb)s;
230 }
231
232 return fault;
233 }
234}};
235
236def template BranchDecode {{

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