branch.isa (2632:1bb2f91485ea) | branch.isa (2944:10dcffb2904f) |
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1// Copyright (c) 2006 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 55 unchanged lines hidden (view full) --- 64 65 std::string generateDisassembly(Addr pc, 66 const SymbolTable *symtab) const; 67 68 int32_t disp; 69 }; 70 71 /** | 1// Copyright (c) 2006 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 55 unchanged lines hidden (view full) --- 64 65 std::string generateDisassembly(Addr pc, 66 const SymbolTable *symtab) const; 67 68 int32_t disp; 69 }; 70 71 /** |
72 * Base class for branches with 19 bit displacements. | 72 * Base class for branches with n bit displacements. |
73 */ | 73 */ |
74 class Branch19 : public BranchDisp | 74 template<int bits> 75 class BranchNBits : public BranchDisp |
75 { 76 protected: 77 // Constructor | 76 { 77 protected: 78 // Constructor |
78 Branch19(const char *mnem, MachInst _machInst, | 79 BranchNBits(const char *mnem, MachInst _machInst, |
79 OpClass __opClass) : 80 BranchDisp(mnem, _machInst, __opClass) 81 { | 80 OpClass __opClass) : 81 BranchDisp(mnem, _machInst, __opClass) 82 { |
82 disp = sign_ext(DISP19 << 2, 21); | 83 disp = sign_ext(_machInst << 2, bits + 2); |
83 } 84 }; 85 86 /** | 84 } 85 }; 86 87 /** |
87 * Base class for branches with 22 bit displacements. 88 */ 89 class Branch22 : public BranchDisp 90 { 91 protected: 92 // Constructor 93 Branch22(const char *mnem, MachInst _machInst, 94 OpClass __opClass) : 95 BranchDisp(mnem, _machInst, __opClass) 96 { 97 disp = sign_ext(DISP22 << 2, 24); 98 } 99 }; 100 101 /** 102 * Base class for branches with 30 bit displacements. 103 */ 104 class Branch30 : public BranchDisp 105 { 106 protected: 107 // Constructor 108 Branch30(const char *mnem, MachInst _machInst, 109 OpClass __opClass) : 110 BranchDisp(mnem, _machInst, __opClass) 111 { 112 disp = sign_ext(DISP30 << 2, 32); 113 } 114 }; 115 116 /** | |
117 * Base class for 16bit split displacements. 118 */ 119 class BranchSplit : public BranchDisp 120 { 121 protected: 122 // Constructor 123 BranchSplit(const char *mnem, MachInst _machInst, 124 OpClass __opClass) : --- 19 unchanged lines hidden (view full) --- 144 std::string generateDisassembly(Addr pc, 145 const SymbolTable *symtab) const; 146 147 int32_t imm; 148 }; 149}}; 150 151output decoder {{ | 88 * Base class for 16bit split displacements. 89 */ 90 class BranchSplit : public BranchDisp 91 { 92 protected: 93 // Constructor 94 BranchSplit(const char *mnem, MachInst _machInst, 95 OpClass __opClass) : --- 19 unchanged lines hidden (view full) --- 115 std::string generateDisassembly(Addr pc, 116 const SymbolTable *symtab) const; 117 118 int32_t imm; 119 }; 120}}; 121 122output decoder {{ |
123 124 template class BranchNBits<19>; 125 126 template class BranchNBits<22>; 127 128 template class BranchNBits<30>; 129 |
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152 std::string Branch::generateDisassembly(Addr pc, 153 const SymbolTable *symtab) const 154 { 155 std::stringstream response; 156 157 printMnemonic(response, mnemonic); | 130 std::string Branch::generateDisassembly(Addr pc, 131 const SymbolTable *symtab) const 132 { 133 std::stringstream response; 134 135 printMnemonic(response, mnemonic); |
158 159 if (_numSrcRegs > 0) 160 { 161 printReg(response, _srcRegIdx[0]); 162 for(int x = 1; x < _numSrcRegs; x++) 163 { | 136 printRegArray(response, _srcRegIdx, _numSrcRegs); 137 if(_numDestRegs && _numSrcRegs) |
164 response << ", "; | 138 response << ", "; |
165 printReg(response, _srcRegIdx[x]); 166 } 167 } | 139 printDestReg(response, 0); |
168 | 140 |
169 if (_numDestRegs > 0) 170 { 171 if(_numSrcRegs > 0) 172 response << ", "; 173 printReg(response, _destRegIdx[0]); 174 } 175 | |
176 return response.str(); 177 } 178 179 std::string BranchImm13::generateDisassembly(Addr pc, 180 const SymbolTable *symtab) const 181 { 182 std::stringstream response; 183 184 printMnemonic(response, mnemonic); | 141 return response.str(); 142 } 143 144 std::string BranchImm13::generateDisassembly(Addr pc, 145 const SymbolTable *symtab) const 146 { 147 std::stringstream response; 148 149 printMnemonic(response, mnemonic); |
185 186 if (_numSrcRegs > 0) 187 { 188 printReg(response, _srcRegIdx[0]); 189 for(int x = 1; x < _numSrcRegs; x++) 190 { 191 response << ", "; 192 printReg(response, _srcRegIdx[x]); 193 } 194 } 195 | 150 printRegArray(response, _srcRegIdx, _numSrcRegs); |
196 if(_numSrcRegs > 0) 197 response << ", "; | 151 if(_numSrcRegs > 0) 152 response << ", "; |
198 | |
199 ccprintf(response, "0x%x", imm); | 153 ccprintf(response, "0x%x", imm); |
200 | |
201 if (_numDestRegs > 0) | 154 if (_numDestRegs > 0) |
202 { | |
203 response << ", "; | 155 response << ", "; |
204 printReg(response, _destRegIdx[0]); 205 } | 156 printDestReg(response, 0); |
206 207 return response.str(); 208 } 209 210 std::string BranchDisp::generateDisassembly(Addr pc, 211 const SymbolTable *symtab) const 212 { 213 std::stringstream response; --- 73 unchanged lines hidden (view full) --- 287 decoder_output += BasicConstructor.subst(imm_iop) 288 exec_output += BranchExecute.subst(imm_iop) 289 decode_block = ROrImmDecode.subst(iop) 290 else: 291 decode_block = BasicDecode.subst(iop) 292}}; 293 294// Primary format for branch instructions: | 157 158 return response.str(); 159 } 160 161 std::string BranchDisp::generateDisassembly(Addr pc, 162 const SymbolTable *symtab) const 163 { 164 std::stringstream response; --- 73 unchanged lines hidden (view full) --- 238 decoder_output += BasicConstructor.subst(imm_iop) 239 exec_output += BranchExecute.subst(imm_iop) 240 decode_block = ROrImmDecode.subst(iop) 241 else: 242 decode_block = BasicDecode.subst(iop) 243}}; 244 245// Primary format for branch instructions: |
295def format Branch19(code, *opt_flags) {{ | 246def format BranchN(bits, code, *opt_flags) {{ |
296 code = re.sub(r'handle_annul', handle_annul, code) 297 codeBlk = CodeBlock(code) | 247 code = re.sub(r'handle_annul', handle_annul, code) 248 codeBlk = CodeBlock(code) |
298 iop = InstObjParams(name, Name, 'Branch19', codeBlk, opt_flags) | 249 iop = InstObjParams(name, Name, "BranchNBits<%d>" % bits, codeBlk, opt_flags) |
299 header_output = BasicDeclare.subst(iop) 300 decoder_output = BasicConstructor.subst(iop) 301 exec_output = BranchExecute.subst(iop) 302 decode_block = BasicDecode.subst(iop) 303}}; 304 305// Primary format for branch instructions: | 250 header_output = BasicDeclare.subst(iop) 251 decoder_output = BasicConstructor.subst(iop) 252 exec_output = BranchExecute.subst(iop) 253 decode_block = BasicDecode.subst(iop) 254}}; 255 256// Primary format for branch instructions: |
306def format Branch22(code, *opt_flags) {{ 307 code = re.sub(r'handle_annul', handle_annul, code) 308 codeBlk = CodeBlock(code) 309 iop = InstObjParams(name, Name, 'Branch22', codeBlk, opt_flags) 310 header_output = BasicDeclare.subst(iop) 311 decoder_output = BasicConstructor.subst(iop) 312 exec_output = BranchExecute.subst(iop) 313 decode_block = BasicDecode.subst(iop) 314}}; 315 316// Primary format for branch instructions: 317def format Branch30(code, *opt_flags) {{ 318 code = re.sub(r'handle_annul', handle_annul, code) 319 codeBlk = CodeBlock(code) 320 iop = InstObjParams(name, Name, 'Branch30', codeBlk, opt_flags) 321 header_output = BasicDeclare.subst(iop) 322 decoder_output = BasicConstructor.subst(iop) 323 exec_output = BranchExecute.subst(iop) 324 decode_block = BasicDecode.subst(iop) 325}}; 326 327// Primary format for branch instructions: | |
328def format BranchSplit(code, *opt_flags) {{ 329 code = re.sub(r'handle_annul', handle_annul, code) 330 codeBlk = CodeBlock(code) 331 iop = InstObjParams(name, Name, 'BranchSplit', codeBlk, opt_flags) 332 header_output = BasicDeclare.subst(iop) 333 decoder_output = BasicConstructor.subst(iop) 334 exec_output = BranchExecute.subst(iop) 335 decode_block = BasicDecode.subst(iop) 336}}; 337 | 257def format BranchSplit(code, *opt_flags) {{ 258 code = re.sub(r'handle_annul', handle_annul, code) 259 codeBlk = CodeBlock(code) 260 iop = InstObjParams(name, Name, 'BranchSplit', codeBlk, opt_flags) 261 header_output = BasicDeclare.subst(iop) 262 decoder_output = BasicConstructor.subst(iop) 263 exec_output = BranchExecute.subst(iop) 264 decode_block = BasicDecode.subst(iop) 265}}; 266 |