1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright
9// notice, this list of conditions and the following disclaimer in the
10// documentation and/or other materials provided with the distribution;
11// neither the name of the copyright holders nor the names of its
12// contributors may be used to endorse or promote products derived from
13// this software without specific prior written permission.
14//
15// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26//
27// Authors: Gabe Black
28// Steve Reinhardt
29
30////////////////////////////////////////////////////////////////////
31//
32// Branch instructions
33//
34
35output header {{
36 /**
37 * Base class for branch operations.
38 */
39 class Branch : public SparcStaticInst
40 {
41 protected:
42 // Constructor
43 Branch(const char *mnem, MachInst _machInst, OpClass __opClass) :
44 SparcStaticInst(mnem, _machInst, __opClass)
45 {
46 }
47
48 std::string generateDisassembly(Addr pc,
49 const SymbolTable *symtab) const;
50 };
51
52 /**
53 * Base class for branch operations with an immediate displacement.
54 */
55 class BranchDisp : public Branch
56 {
57 protected:
58 // Constructor
59 BranchDisp(const char *mnem, MachInst _machInst,
60 OpClass __opClass) :
61 Branch(mnem, _machInst, __opClass)
62 {
63 }
64
65 std::string generateDisassembly(Addr pc,
66 const SymbolTable *symtab) const;
67
68 int32_t disp;
69 };
70
71 /**
72 * Base class for branches with n bit displacements.
73 */
74 template<int bits>
75 class BranchNBits : public BranchDisp
76 {
77 protected:
78 // Constructor
79 BranchNBits(const char *mnem, MachInst _machInst,
80 OpClass __opClass) :
81 BranchDisp(mnem, _machInst, __opClass)
82 {
83 disp = sext<bits + 2>((_machInst & mask(bits)) << 2);
84 }
85 };
86
87 /**
88 * Base class for 16bit split displacements.
89 */
90 class BranchSplit : public BranchDisp
91 {
92 protected:
93 // Constructor
94 BranchSplit(const char *mnem, MachInst _machInst,
95 OpClass __opClass) :
96 BranchDisp(mnem, _machInst, __opClass)
97 {
98 disp = sext<18>((D16HI << 16) | (D16LO << 2));
99 }
100 };
101
102 /**
103 * Base class for branches that use an immediate and a register to
104 * compute their displacements.
105 */
106 class BranchImm13 : public Branch
107 {
108 protected:
109 // Constructor
110 BranchImm13(const char *mnem, MachInst _machInst, OpClass __opClass) :
111 Branch(mnem, _machInst, __opClass), imm(sext<13>(SIMM13))
112 {
113 }
114
115 std::string generateDisassembly(Addr pc,
116 const SymbolTable *symtab) const;
117
118 int32_t imm;
119 };
120}};
121
122output decoder {{
123
124 template class BranchNBits<19>;
125
126 template class BranchNBits<22>;
127
128 template class BranchNBits<30>;
129
130 std::string Branch::generateDisassembly(Addr pc,
131 const SymbolTable *symtab) const
132 {
133 std::stringstream response;
134
135 printMnemonic(response, mnemonic);
136 printRegArray(response, _srcRegIdx, _numSrcRegs);
137 if(_numDestRegs && _numSrcRegs)
138 response << ", ";
139 printDestReg(response, 0);
140
141 return response.str();
142 }
143
144 std::string BranchImm13::generateDisassembly(Addr pc,
145 const SymbolTable *symtab) const
146 {
147 std::stringstream response;
148
149 printMnemonic(response, mnemonic);
150 printRegArray(response, _srcRegIdx, _numSrcRegs);
151 if(_numSrcRegs > 0)
152 response << ", ";
153 ccprintf(response, "0x%x", imm);
154 if (_numDestRegs > 0)
155 response << ", ";
156 printDestReg(response, 0);
157
158 return response.str();
159 }
160
161 std::string BranchDisp::generateDisassembly(Addr pc,
162 const SymbolTable *symtab) const
163 {
164 std::stringstream response;
165 std::string symbol;
166 Addr symbolAddr;
167
168 Addr target = disp + pc;
169
170 printMnemonic(response, mnemonic);
171 ccprintf(response, "0x%x", target);
172
173 if(symtab && symtab->findNearestSymbol(target, symbol, symbolAddr))
174 {
175 ccprintf(response, " <%s", symbol);
176 if(symbolAddr != target)
177 ccprintf(response, "+%d>", target - symbolAddr);
178 else
179 ccprintf(response, ">");
180 }
181
182 return response.str();
183 }
184}};
185
186def template BranchExecute {{
187 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
188 Trace::InstRecord *traceData) const
189 {
190 //Attempt to execute the instruction
191 Fault fault = NoFault;
192
193 %(op_decl)s;
194 %(op_rd)s;
195
196 NNPC = xc->readNextNPC();
197 %(code)s;
198
199 if(fault == NoFault)
200 {
201 //Write the resulting state to the execution context
202 %(op_wb)s;
203 }
204
205 return fault;
206 }
207}};
208
209let {{
210 handle_annul = '''
211 {
212 if(A)
213 {
| 1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright
9// notice, this list of conditions and the following disclaimer in the
10// documentation and/or other materials provided with the distribution;
11// neither the name of the copyright holders nor the names of its
12// contributors may be used to endorse or promote products derived from
13// this software without specific prior written permission.
14//
15// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26//
27// Authors: Gabe Black
28// Steve Reinhardt
29
30////////////////////////////////////////////////////////////////////
31//
32// Branch instructions
33//
34
35output header {{
36 /**
37 * Base class for branch operations.
38 */
39 class Branch : public SparcStaticInst
40 {
41 protected:
42 // Constructor
43 Branch(const char *mnem, MachInst _machInst, OpClass __opClass) :
44 SparcStaticInst(mnem, _machInst, __opClass)
45 {
46 }
47
48 std::string generateDisassembly(Addr pc,
49 const SymbolTable *symtab) const;
50 };
51
52 /**
53 * Base class for branch operations with an immediate displacement.
54 */
55 class BranchDisp : public Branch
56 {
57 protected:
58 // Constructor
59 BranchDisp(const char *mnem, MachInst _machInst,
60 OpClass __opClass) :
61 Branch(mnem, _machInst, __opClass)
62 {
63 }
64
65 std::string generateDisassembly(Addr pc,
66 const SymbolTable *symtab) const;
67
68 int32_t disp;
69 };
70
71 /**
72 * Base class for branches with n bit displacements.
73 */
74 template<int bits>
75 class BranchNBits : public BranchDisp
76 {
77 protected:
78 // Constructor
79 BranchNBits(const char *mnem, MachInst _machInst,
80 OpClass __opClass) :
81 BranchDisp(mnem, _machInst, __opClass)
82 {
83 disp = sext<bits + 2>((_machInst & mask(bits)) << 2);
84 }
85 };
86
87 /**
88 * Base class for 16bit split displacements.
89 */
90 class BranchSplit : public BranchDisp
91 {
92 protected:
93 // Constructor
94 BranchSplit(const char *mnem, MachInst _machInst,
95 OpClass __opClass) :
96 BranchDisp(mnem, _machInst, __opClass)
97 {
98 disp = sext<18>((D16HI << 16) | (D16LO << 2));
99 }
100 };
101
102 /**
103 * Base class for branches that use an immediate and a register to
104 * compute their displacements.
105 */
106 class BranchImm13 : public Branch
107 {
108 protected:
109 // Constructor
110 BranchImm13(const char *mnem, MachInst _machInst, OpClass __opClass) :
111 Branch(mnem, _machInst, __opClass), imm(sext<13>(SIMM13))
112 {
113 }
114
115 std::string generateDisassembly(Addr pc,
116 const SymbolTable *symtab) const;
117
118 int32_t imm;
119 };
120}};
121
122output decoder {{
123
124 template class BranchNBits<19>;
125
126 template class BranchNBits<22>;
127
128 template class BranchNBits<30>;
129
130 std::string Branch::generateDisassembly(Addr pc,
131 const SymbolTable *symtab) const
132 {
133 std::stringstream response;
134
135 printMnemonic(response, mnemonic);
136 printRegArray(response, _srcRegIdx, _numSrcRegs);
137 if(_numDestRegs && _numSrcRegs)
138 response << ", ";
139 printDestReg(response, 0);
140
141 return response.str();
142 }
143
144 std::string BranchImm13::generateDisassembly(Addr pc,
145 const SymbolTable *symtab) const
146 {
147 std::stringstream response;
148
149 printMnemonic(response, mnemonic);
150 printRegArray(response, _srcRegIdx, _numSrcRegs);
151 if(_numSrcRegs > 0)
152 response << ", ";
153 ccprintf(response, "0x%x", imm);
154 if (_numDestRegs > 0)
155 response << ", ";
156 printDestReg(response, 0);
157
158 return response.str();
159 }
160
161 std::string BranchDisp::generateDisassembly(Addr pc,
162 const SymbolTable *symtab) const
163 {
164 std::stringstream response;
165 std::string symbol;
166 Addr symbolAddr;
167
168 Addr target = disp + pc;
169
170 printMnemonic(response, mnemonic);
171 ccprintf(response, "0x%x", target);
172
173 if(symtab && symtab->findNearestSymbol(target, symbol, symbolAddr))
174 {
175 ccprintf(response, " <%s", symbol);
176 if(symbolAddr != target)
177 ccprintf(response, "+%d>", target - symbolAddr);
178 else
179 ccprintf(response, ">");
180 }
181
182 return response.str();
183 }
184}};
185
186def template BranchExecute {{
187 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
188 Trace::InstRecord *traceData) const
189 {
190 //Attempt to execute the instruction
191 Fault fault = NoFault;
192
193 %(op_decl)s;
194 %(op_rd)s;
195
196 NNPC = xc->readNextNPC();
197 %(code)s;
198
199 if(fault == NoFault)
200 {
201 //Write the resulting state to the execution context
202 %(op_wb)s;
203 }
204
205 return fault;
206 }
207}};
208
209let {{
210 handle_annul = '''
211 {
212 if(A)
213 {
|
221 }
222 }'''
223}};
224
225// Primary format for branch instructions:
226def format Branch(code, *opt_flags) {{
227 (usesImm, code, immCode,
228 rString, iString) = splitOutImm(code)
229 iop = InstObjParams(name, Name, 'Branch', code, opt_flags)
230 header_output = BasicDeclare.subst(iop)
231 decoder_output = BasicConstructor.subst(iop)
232 exec_output = BranchExecute.subst(iop)
233 if usesImm:
234 imm_iop = InstObjParams(name, Name + 'Imm', 'BranchImm' + iString,
235 immCode, opt_flags)
236 header_output += BasicDeclare.subst(imm_iop)
237 decoder_output += BasicConstructor.subst(imm_iop)
238 exec_output += BranchExecute.subst(imm_iop)
239 decode_block = ROrImmDecode.subst(iop)
240 else:
241 decode_block = BasicDecode.subst(iop)
242}};
243
244// Primary format for branch instructions:
245def format BranchN(bits, code, *opt_flags) {{
246 code = re.sub(r'handle_annul', handle_annul, code)
247 new_opt_flags = []
248 for flag in opt_flags:
249 if flag == ',a':
250 name += ',a'
251 Name += 'Annul'
252 else:
253 new_opt_flags += flag
254 iop = InstObjParams(name, Name, "BranchNBits<%d>" % bits, code, new_opt_flags)
255 header_output = BasicDeclare.subst(iop)
256 decoder_output = BasicConstructor.subst(iop)
257 exec_output = BranchExecute.subst(iop)
258 decode_block = BasicDecode.subst(iop)
259}};
260
261// Primary format for branch instructions:
262def format BranchSplit(code, *opt_flags) {{
263 code = re.sub(r'handle_annul', handle_annul, code)
264 iop = InstObjParams(name, Name, 'BranchSplit', code, opt_flags)
265 header_output = BasicDeclare.subst(iop)
266 decoder_output = BasicConstructor.subst(iop)
267 exec_output = BranchExecute.subst(iop)
268 decode_block = BasicDecode.subst(iop)
269}};
270
| 221 }
222 }'''
223}};
224
225// Primary format for branch instructions:
226def format Branch(code, *opt_flags) {{
227 (usesImm, code, immCode,
228 rString, iString) = splitOutImm(code)
229 iop = InstObjParams(name, Name, 'Branch', code, opt_flags)
230 header_output = BasicDeclare.subst(iop)
231 decoder_output = BasicConstructor.subst(iop)
232 exec_output = BranchExecute.subst(iop)
233 if usesImm:
234 imm_iop = InstObjParams(name, Name + 'Imm', 'BranchImm' + iString,
235 immCode, opt_flags)
236 header_output += BasicDeclare.subst(imm_iop)
237 decoder_output += BasicConstructor.subst(imm_iop)
238 exec_output += BranchExecute.subst(imm_iop)
239 decode_block = ROrImmDecode.subst(iop)
240 else:
241 decode_block = BasicDecode.subst(iop)
242}};
243
244// Primary format for branch instructions:
245def format BranchN(bits, code, *opt_flags) {{
246 code = re.sub(r'handle_annul', handle_annul, code)
247 new_opt_flags = []
248 for flag in opt_flags:
249 if flag == ',a':
250 name += ',a'
251 Name += 'Annul'
252 else:
253 new_opt_flags += flag
254 iop = InstObjParams(name, Name, "BranchNBits<%d>" % bits, code, new_opt_flags)
255 header_output = BasicDeclare.subst(iop)
256 decoder_output = BasicConstructor.subst(iop)
257 exec_output = BranchExecute.subst(iop)
258 decode_block = BasicDecode.subst(iop)
259}};
260
261// Primary format for branch instructions:
262def format BranchSplit(code, *opt_flags) {{
263 code = re.sub(r'handle_annul', handle_annul, code)
264 iop = InstObjParams(name, Name, 'BranchSplit', code, opt_flags)
265 header_output = BasicDeclare.subst(iop)
266 decoder_output = BasicConstructor.subst(iop)
267 exec_output = BranchExecute.subst(iop)
268 decode_block = BasicDecode.subst(iop)
269}};
270
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