decoder.isa (5096:eb06635e06ac) | decoder.isa (5893:41b18fe25a0e) |
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1// Copyright (c) 2006-2007 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 1217 unchanged lines hidden (view full) --- 1226 return fault; 1227 Fsr = Mem.udw;}}); 1228 default: FailUnimpl::ldfsrOther(); 1229 } 1230 0x22: ldqf({{fault = new FpDisabled;}}); 1231 0x23: Load::lddf({{Frd.udw = Mem.udw;}}); 1232 0x24: Store::stf({{Mem.uw = Frds.uw;}}); 1233 0x25: decode RD { | 1// Copyright (c) 2006-2007 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 1217 unchanged lines hidden (view full) --- 1226 return fault; 1227 Fsr = Mem.udw;}}); 1228 default: FailUnimpl::ldfsrOther(); 1229 } 1230 0x22: ldqf({{fault = new FpDisabled;}}); 1231 0x23: Load::lddf({{Frd.udw = Mem.udw;}}); 1232 0x24: Store::stf({{Mem.uw = Frds.uw;}}); 1233 0x25: decode RD { |
1234 0x0: Store::stfsr({{fault = checkFpEnableFault(xc); 1235 if (fault) 1236 return fault; 1237 Mem.uw = Fsr<31:0>; 1238 Fsr = insertBits(Fsr,16,14,0);}}); 1239 0x1: Store::stxfsr({{fault = checkFpEnableFault(xc); 1240 if (fault) 1241 return fault; 1242 Mem.udw = Fsr; 1243 Fsr = insertBits(Fsr,16,14,0);}}); | 1234 0x0: StoreFsr::stfsr({{fault = checkFpEnableFault(xc); 1235 if (fault) 1236 return fault; 1237 Mem.uw = Fsr<31:0>;}}); 1238 0x1: StoreFsr::stxfsr({{fault = checkFpEnableFault(xc); 1239 if (fault) 1240 return fault; 1241 Mem.udw = Fsr;}}); |
1244 default: FailUnimpl::stfsrOther(); 1245 } 1246 0x26: stqf({{fault = new FpDisabled;}}); 1247 0x27: Store::stdf({{Mem.udw = Frd.udw;}}); 1248 0x2D: Nop::prefetch({{ }}); 1249 0x30: LoadAlt::ldfa({{Frds.uw = Mem.uw;}}); 1250 0x32: ldqfa({{fault = new FpDisabled;}}); 1251 format LoadAlt { --- 177 unchanged lines hidden --- | 1242 default: FailUnimpl::stfsrOther(); 1243 } 1244 0x26: stqf({{fault = new FpDisabled;}}); 1245 0x27: Store::stdf({{Mem.udw = Frd.udw;}}); 1246 0x2D: Nop::prefetch({{ }}); 1247 0x30: LoadAlt::ldfa({{Frds.uw = Mem.uw;}}); 1248 0x32: ldqfa({{fault = new FpDisabled;}}); 1249 format LoadAlt { --- 177 unchanged lines hidden --- |