decoder.isa (4237:3493eb63512e) decoder.isa (4256:35bb4cc24b18)
1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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1319 RdHigh = (Mem.tuw).b;
1320 }});
1321 }
1322 format Store {
1323 0x04: stw({{Mem.uw = Rd.sw;}});
1324 0x05: stb({{Mem.ub = Rd.sb;}});
1325 0x06: sth({{Mem.uhw = Rd.shw;}});
1326 0x07: sttw({{
1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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1319 RdHigh = (Mem.tuw).b;
1320 }});
1321 }
1322 format Store {
1323 0x04: stw({{Mem.uw = Rd.sw;}});
1324 0x05: stb({{Mem.ub = Rd.sb;}});
1325 0x06: sth({{Mem.uhw = Rd.shw;}});
1326 0x07: sttw({{
1327 (Mem.tuw).a = RdLow<31:0>;
1328 (Mem.tuw).b = RdHigh<31:0>;
1327 //This temporary needs to be here so that the parser
1328 //will correctly identify this instruction as a store.
1329 //It's probably either the parenthesis or referencing
1330 //the member variable that throws confuses it.
1331 Twin32_t temp;
1332 temp.a = RdLow<31:0>;
1333 temp.b = RdHigh<31:0>;
1334 Mem.tuw = temp;
1329 }});
1330 }
1331 format Load {
1332 0x08: ldsw({{Rd = (int32_t)Mem.sw;}});
1333 0x09: ldsb({{Rd = (int8_t)Mem.sb;}});
1334 0x0A: ldsh({{Rd = (int16_t)Mem.shw;}});
1335 0x0B: ldx({{Rd = (int64_t)Mem.sdw;}});
1336 }

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1412 }}, {{EXT_ASI}});
1413 }
1414 }
1415 format StoreAlt {
1416 0x14: stwa({{Mem.uw = Rd;}}, {{EXT_ASI}});
1417 0x15: stba({{Mem.ub = Rd;}}, {{EXT_ASI}});
1418 0x16: stha({{Mem.uhw = Rd;}}, {{EXT_ASI}});
1419 0x17: sttwa({{
1335 }});
1336 }
1337 format Load {
1338 0x08: ldsw({{Rd = (int32_t)Mem.sw;}});
1339 0x09: ldsb({{Rd = (int8_t)Mem.sb;}});
1340 0x0A: ldsh({{Rd = (int16_t)Mem.shw;}});
1341 0x0B: ldx({{Rd = (int64_t)Mem.sdw;}});
1342 }

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1418 }}, {{EXT_ASI}});
1419 }
1420 }
1421 format StoreAlt {
1422 0x14: stwa({{Mem.uw = Rd;}}, {{EXT_ASI}});
1423 0x15: stba({{Mem.ub = Rd;}}, {{EXT_ASI}});
1424 0x16: stha({{Mem.uhw = Rd;}}, {{EXT_ASI}});
1425 0x17: sttwa({{
1420 (Mem.tuw).a = RdLow<31:0>;
1421 (Mem.tuw).b = RdHigh<31:0>;
1426 //This temporary needs to be here so that the parser
1427 //will correctly identify this instruction as a store.
1428 //It's probably either the parenthesis or referencing
1429 //the member variable that throws confuses it.
1430 Twin32_t temp;
1431 temp.a = RdLow<31:0>;
1432 temp.b = RdHigh<31:0>;
1433 Mem.tuw = temp;
1422 }}, {{EXT_ASI}});
1423 }
1424 format LoadAlt {
1425 0x18: ldswa({{Rd = (int32_t)Mem.sw;}}, {{EXT_ASI}});
1426 0x19: ldsba({{Rd = (int8_t)Mem.sb;}}, {{EXT_ASI}});
1427 0x1A: ldsha({{Rd = (int16_t)Mem.shw;}}, {{EXT_ASI}});
1428 0x1B: ldxa({{Rd = (int64_t)Mem.sdw;}}, {{EXT_ASI}});
1429 }

--- 224 unchanged lines hidden --- 		1434 }}, {{EXT_ASI}});
1435 }
1436 format LoadAlt {
1437 0x18: ldswa({{Rd = (int32_t)Mem.sw;}}, {{EXT_ASI}});
1438 0x19: ldsba({{Rd = (int8_t)Mem.sb;}}, {{EXT_ASI}});
1439 0x1A: ldsha({{Rd = (int16_t)Mem.shw;}}, {{EXT_ASI}});
1440 0x1B: ldxa({{Rd = (int64_t)Mem.sdw;}}, {{EXT_ASI}});
1441 }

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