decoder.isa (4194:af4f6022394b) decoder.isa (4204:43daa3de387e)
1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

--- 802 unchanged lines hidden (view full) ---

811 Fsr = insertBits(Fsr, 4,0, 0x01);
812 }});
813 0xD3: FpUnimpl::fqtoi();
814 default: FailUnimpl::fpop1();
815 }
816 }
817 0x35: decode OPF{
818 format FpBasic{
1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

--- 802 unchanged lines hidden (view full) ---

811 Fsr = insertBits(Fsr, 4,0, 0x01);
812 }});
813 0xD3: FpUnimpl::fqtoi();
814 default: FailUnimpl::fpop1();
815 }
816 }
817 0x35: decode OPF{
818 format FpBasic{
819 0x01: fmovs_fcc0({{
820 if(passesFpCondition(Fsr<11:10>, COND4))
821 Frds = Frs2s;
822 else
823 Frds = Frds;
824 }});
825 0x02: fmovd_fcc0({{
826 if(passesFpCondition(Fsr<11:10>, COND4))
827 Frd = Frs2;
828 else
829 Frd = Frd;
830 }});
831 0x03: FpUnimpl::fmovq_fcc0();
832 0x25: fmovrsz({{
833 if(Rs1 == 0)
834 Frds = Frs2s;
835 else
836 Frds = Frds;
837 }});
838 0x26: fmovrdz({{
839 if(Rs1 == 0)
840 Frd = Frs2;
841 else
842 Frd = Frd;
843 }});
844 0x27: FpUnimpl::fmovrqz();
845 0x41: fmovs_fcc1({{
846 if(passesFpCondition(Fsr<33:32>, COND4))
847 Frds = Frs2s;
848 else
849 Frds = Frds;
850 }});
851 0x42: fmovd_fcc1({{
852 if(passesFpCondition(Fsr<33:32>, COND4))
853 Frd = Frs2;
854 else
855 Frd = Frd;
856 }});
857 0x43: FpUnimpl::fmovq_fcc1();
858 0x45: fmovrslez({{
859 if(Rs1 <= 0)
860 Frds = Frs2s;
861 else
862 Frds = Frds;
863 }});
864 0x46: fmovrdlez({{
865 if(Rs1 <= 0)
866 Frd = Frs2;
867 else
868 Frd = Frd;
869 }});
870 0x47: FpUnimpl::fmovrqlez();
819 0x51: fcmps({{
820 uint8_t fcc;
821 if(isnan(Frs1s) || isnan(Frs2s))
822 fcc = 3;
823 else if(Frs1s < Frs2s)
824 fcc = 1;
825 else if(Frs1s > Frs2s)
826 fcc = 2;

--- 42 unchanged lines hidden (view full) ---

869 else if(Frs1 > Frs2)
870 fcc = 2;
871 uint8_t firstbit = 10;
872 if(FCMPCC)
873 firstbit = FCMPCC * 2 + 30;
874 Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc);
875 }});
876 0x57: FpUnimpl::fcmpeq();
871 0x51: fcmps({{
872 uint8_t fcc;
873 if(isnan(Frs1s) || isnan(Frs2s))
874 fcc = 3;
875 else if(Frs1s < Frs2s)
876 fcc = 1;
877 else if(Frs1s > Frs2s)
878 fcc = 2;

--- 42 unchanged lines hidden (view full) ---

921 else if(Frs1 > Frs2)
922 fcc = 2;
923 uint8_t firstbit = 10;
924 if(FCMPCC)
925 firstbit = FCMPCC * 2 + 30;
926 Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc);
927 }});
928 0x57: FpUnimpl::fcmpeq();
929 0x65: fmovrslz({{
930 if(Rs1 < 0)
931 Frds = Frs2s;
932 else
933 Frds = Frds;
934 }});
935 0x66: fmovrdlz({{
936 if(Rs1 < 0)
937 Frd = Frs2;
938 else
939 Frd = Frd;
940 }});
941 0x67: FpUnimpl::fmovrqlz();
942 0x81: fmovs_fcc2({{
943 if(passesFpCondition(Fsr<35:34>, COND4))
944 Frds = Frs2s;
945 else
946 Frds = Frds;
947 }});
948 0x82: fmovd_fcc2({{
949 if(passesFpCondition(Fsr<35:34>, COND4))
950 Frd = Frs2;
951 else
952 Frd = Frd;
953 }});
954 0x83: FpUnimpl::fmovq_fcc2();
955 0xA5: fmovrsnz({{
956 if(Rs1 != 0)
957 Frds = Frs2s;
958 else
959 Frds = Frds;
960 }});
961 0xA6: fmovrdnz({{
962 if(Rs1 != 0)
963 Frd = Frs2;
964 else
965 Frd = Frd;
966 }});
967 0xA7: FpUnimpl::fmovrqnz();
968 0xC1: fmovs_fcc3({{
969 if(passesFpCondition(Fsr<37:36>, COND4))
970 Frds = Frs2s;
971 else
972 Frds = Frds;
973 }});
974 0xC2: fmovd_fcc3({{
975 if(passesFpCondition(Fsr<37:36>, COND4))
976 Frd = Frs2;
977 else
978 Frd = Frd;
979 }});
980 0xC3: FpUnimpl::fmovq_fcc3();
981 0xC5: fmovrsgz({{
982 if(Rs1 > 0)
983 Frds = Frs2s;
984 else
985 Frds = Frds;
986 }});
987 0xC6: fmovrdgz({{
988 if(Rs1 > 0)
989 Frd = Frs2;
990 else
991 Frd = Frd;
992 }});
993 0xC7: FpUnimpl::fmovrqgz();
994 0xE5: fmovrsgez({{
995 if(Rs1 >= 0)
996 Frds = Frs2s;
997 else
998 Frds = Frds;
999 }});
1000 0xE6: fmovrdgez({{
1001 if(Rs1 >= 0)
1002 Frd = Frs2;
1003 else
1004 Frd = Frd;
1005 }});
1006 0xE7: FpUnimpl::fmovrqgez();
1007 0x101: fmovs_icc({{
1008 if(passesCondition(Ccr<3:0>, COND4))
1009 Frds = Frs2s;
1010 else
1011 Frds = Frds;
1012 }});
1013 0x102: fmovd_icc({{
1014 if(passesCondition(Ccr<3:0>, COND4))
1015 Frd = Frs2;
1016 else
1017 Frd = Frd;
1018 }});
1019 0x103: FpUnimpl::fmovq_icc();
1020 0x181: fmovs_xcc({{
1021 if(passesCondition(Ccr<7:4>, COND4))
1022 Frds = Frs2s;
1023 else
1024 Frds = Frds;
1025 }});
1026 0x182: fmovd_xcc({{
1027 if(passesCondition(Ccr<7:4>, COND4))
1028 Frd = Frs2;
1029 else
1030 Frd = Frd;
1031 }});
1032 0x183: FpUnimpl::fmovq_xcc();
877 default: FailUnimpl::fpop2();
878 }
879 }
880 //This used to be just impdep1, but now it's a whole bunch
881 //of instructions
882 0x36: decode OPF{
883 0x00: FailUnimpl::edge8();
884 0x01: FailUnimpl::edge8n();

--- 604 unchanged lines hidden --- 		1033 default: FailUnimpl::fpop2();
1034 }
1035 }
1036 //This used to be just impdep1, but now it's a whole bunch
1037 //of instructions
1038 0x36: decode OPF{
1039 0x00: FailUnimpl::edge8();
1040 0x01: FailUnimpl::edge8n();

--- 604 unchanged lines hidden ---