decoder.isa (3753:a95cd790181a) decoder.isa (3765:4035cb300ce9)
1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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71 0x0: bpcci(19, {{
72 if(passesCondition(Ccr<3:0>, COND2))
73 NNPC = xc->readPC() + disp;
74 else
75 handle_annul
76 }});
77 0x2: bpccx(19, {{
78 if(passesCondition(Ccr<7:4>, COND2))
1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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71 0x0: bpcci(19, {{
72 if(passesCondition(Ccr<3:0>, COND2))
73 NNPC = xc->readPC() + disp;
74 else
75 handle_annul
76 }});
77 0x2: bpccx(19, {{
78 if(passesCondition(Ccr<7:4>, COND2))
79 {
80 //warn("Took branch!\n");
79 NNPC = xc->readPC() + disp;
81 NNPC = xc->readPC() + disp;
82 }
80 else
83 else
84 {
85 //warn("Didn't take branch!\n");
81 handle_annul
86 handle_annul
87 }
82 }});
83 }
84 }
85 //bicc
86 0x2: decode COND2
87 {
88 //Branch Always
89 0x8: decode A

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242 int64_t carryin = Ccr<0:0>;
243 Rd = resTemp = Rs1 + val2 + carryin;}},
244 {{(Rs1<31:0> + val2<31:0> + carryin)<32:>}},
245 {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}},
246 {{(Rs1<63:1> + val2<63:1> +
247 ((Rs1 & val2) | (carryin & (Rs1 | val2)))<0:>)<63:>}},
248 {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
249 );
88 }});
89 }
90 }
91 //bicc
92 0x2: decode COND2
93 {
94 //Branch Always
95 0x8: decode A

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248 int64_t carryin = Ccr<0:0>;
249 Rd = resTemp = Rs1 + val2 + carryin;}},
250 {{(Rs1<31:0> + val2<31:0> + carryin)<32:>}},
251 {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}},
252 {{(Rs1<63:1> + val2<63:1> +
253 ((Rs1 & val2) | (carryin & (Rs1 | val2)))<0:>)<63:>}},
254 {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
255 );
250 0x1A: umulcc({{
256 0x1A: IntOpCcRes::umulcc({{
251 uint64_t resTemp;
252 Rd = resTemp = Rs1.udw<31:0> * Rs2_or_imm13.udw<31:0>;
257 uint64_t resTemp;
258 Rd = resTemp = Rs1.udw<31:0> * Rs2_or_imm13.udw<31:0>;
253 Y = resTemp<63:32>;}},
254 {{0}},{{0}},{{0}},{{0}});
255 0x1B: smulcc({{
259 Y = resTemp<63:32>;}});
260 0x1B: IntOpCcRes::smulcc({{
256 int64_t resTemp;
257 Rd = resTemp = Rs1.sdw<31:0> * Rs2_or_imm13.sdw<31:0>;
261 int64_t resTemp;
262 Rd = resTemp = Rs1.sdw<31:0> * Rs2_or_imm13.sdw<31:0>;
258 Y = resTemp<63:32>;}},
259 {{0}},{{0}},{{0}},{{0}});
263 Y = resTemp<63:32>;}});
260 0x1C: subccc({{
261 int64_t resTemp, val2 = Rs2_or_imm13;
262 int64_t carryin = Ccr<0:0>;
263 Rd = resTemp = Rs1 + ~val2 + 1 - carryin;}},
264 {{(~((Rs1<31:0> + (~(val2 + carryin))<31:0> + 1))<32:>)}},
265 {{Rs1<31:> != val2<31:> && Rs1<31:> != resTemp<31:>}},
266 {{(~((Rs1<63:1> + (~(val2 + carryin))<63:1>) + (Rs1<0:> + (~(val2+carryin))<0:> + 1)<63:1>))<63:>}},
267 {{Rs1<63:> != val2<63:> && Rs1<63:> != resTemp<63:>}}
268 );
264 0x1C: subccc({{
265 int64_t resTemp, val2 = Rs2_or_imm13;
266 int64_t carryin = Ccr<0:0>;
267 Rd = resTemp = Rs1 + ~val2 + 1 - carryin;}},
268 {{(~((Rs1<31:0> + (~(val2 + carryin))<31:0> + 1))<32:>)}},
269 {{Rs1<31:> != val2<31:> && Rs1<31:> != resTemp<31:>}},
270 {{(~((Rs1<63:1> + (~(val2 + carryin))<63:1>) + (Rs1<0:> + (~(val2+carryin))<0:> + 1)<63:1>))<63:>}},
271 {{Rs1<63:> != val2<63:> && Rs1<63:> != resTemp<63:>}}
272 );
269 0x1D: udivxcc({{
273 0x1D: IntOpCcRes::udivxcc({{
270 if(Rs2_or_imm13.udw == 0) fault = new DivisionByZero;
274 if(Rs2_or_imm13.udw == 0) fault = new DivisionByZero;
271 else Rd = Rs1.udw / Rs2_or_imm13.udw;}}
272 ,{{0}},{{0}},{{0}},{{0}});
275 else Rd = Rs1.udw / Rs2_or_imm13.udw;}});
273 0x1E: udivcc({{
274 uint32_t resTemp, val2 = Rs2_or_imm13.udw;
275 int32_t overflow = 0;
276 if(val2 == 0) fault = new DivisionByZero;
277 else
278 {
279 resTemp = (uint64_t)((Y << 32) | Rs1.udw<31:0>) / val2;
280 overflow = (resTemp<63:32> != 0);

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875 fault = new MemAddressNotAligned;
876 else
877 {
878 Rd = xc->readPC();
879 NNPC = target;
880 }
881 }});
882 0x39: Branch::return({{
276 0x1E: udivcc({{
277 uint32_t resTemp, val2 = Rs2_or_imm13.udw;
278 int32_t overflow = 0;
279 if(val2 == 0) fault = new DivisionByZero;
280 else
281 {
282 resTemp = (uint64_t)((Y << 32) | Rs1.udw<31:0>) / val2;
283 overflow = (resTemp<63:32> != 0);

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878 fault = new MemAddressNotAligned;
879 else
880 {
881 Rd = xc->readPC();
882 NNPC = target;
883 }
884 }});
885 0x39: Branch::return({{
883 //If both MemAddressNotAligned and
884 //a fill trap happen, it's not clear
885 //which one should be returned.
886 Addr target = Rs1 + Rs2_or_imm13;
886 Addr target = Rs1 + Rs2_or_imm13;
887 if(target & 0x3)
888 fault = new MemAddressNotAligned;
889 else
890 NNPC = target;
891 if(fault == NoFault)
892 {
887 if(fault == NoFault)
888 {
889 //Check for fills which are higher priority than alignment
890 //faults.
893 if(Canrestore == 0)
894 {
895 if(Otherwin)
896 fault = new FillNOther(Wstate<5:3>);
897 else
898 fault = new FillNNormal(Wstate<2:0>);
899 }
891 if(Canrestore == 0)
892 {
893 if(Otherwin)
894 fault = new FillNOther(Wstate<5:3>);
895 else
896 fault = new FillNNormal(Wstate<2:0>);
897 }
898 //Check for alignment faults
899 else if(target & 0x3)
900 fault = new MemAddressNotAligned;
900 else
901 {
901 else
902 {
902 //CWP should be set directly so that it always happens
903 //Also, this will allow writing to the new window and
904 //reading from the old one
903 NNPC = target;
905 Cwp = (Cwp - 1 + NWindows) % NWindows;
906 Cansave = Cansave + 1;
907 Canrestore = Canrestore - 1;
904 Cwp = (Cwp - 1 + NWindows) % NWindows;
905 Cansave = Cansave + 1;
906 Canrestore = Canrestore - 1;
908 //This is here to make sure the CWP is written
909 //no matter what. This ensures that the results
910 //are written in the new window as well.
911 xc->setMiscRegWithEffect(MISCREG_CWP, Cwp);
912 }
913 }
914 }});
915 0x3A: decode CC
916 {
917 0x0: Trap::tcci({{
918 if(passesCondition(Ccr<3:0>, COND2))
919 {
920#if FULL_SYSTEM
921 int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2);
922 DPRINTF(Sparc, "The trap number is %d\n", lTrapNum);
923 fault = new TrapInstruction(lTrapNum);
924#else
925 DPRINTF(Sparc, "The syscall number is %d\n", R1);
926 xc->syscall(R1);
927#endif
928 }
907 }
908 }
909 }});
910 0x3A: decode CC
911 {
912 0x0: Trap::tcci({{
913 if(passesCondition(Ccr<3:0>, COND2))
914 {
915#if FULL_SYSTEM
916 int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2);
917 DPRINTF(Sparc, "The trap number is %d\n", lTrapNum);
918 fault = new TrapInstruction(lTrapNum);
919#else
920 DPRINTF(Sparc, "The syscall number is %d\n", R1);
921 xc->syscall(R1);
922#endif
923 }
929 }});
924 }}, IsSerializeAfter, IsNonSpeculative);
930 0x2: Trap::tccx({{
931 if(passesCondition(Ccr<7:4>, COND2))
932 {
933#if FULL_SYSTEM
934 int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2);
935 DPRINTF(Sparc, "The trap number is %d\n", lTrapNum);
936 fault = new TrapInstruction(lTrapNum);
937#else
938 DPRINTF(Sparc, "The syscall number is %d\n", R1);
939 xc->syscall(R1);
940#endif
941 }
925 0x2: Trap::tccx({{
926 if(passesCondition(Ccr<7:4>, COND2))
927 {
928#if FULL_SYSTEM
929 int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2);
930 DPRINTF(Sparc, "The trap number is %d\n", lTrapNum);
931 fault = new TrapInstruction(lTrapNum);
932#else
933 DPRINTF(Sparc, "The syscall number is %d\n", R1);
934 xc->syscall(R1);
935#endif
936 }
942 }});
937 }}, IsSerializeAfter, IsNonSpeculative);
943 }
944 0x3B: Nop::flush({{/*Instruction memory flush*/}});
945 0x3C: save({{
938 }
939 0x3B: Nop::flush({{/*Instruction memory flush*/}});
940 0x3C: save({{
946 //CWP should be set directly so that it always happens
947 //Also, this will allow writing to the new window and
948 //reading from the old one
949 if(Cansave == 0)
950 {
951 if(Otherwin)
952 fault = new SpillNOther(Wstate<5:3>);
953 else
954 fault = new SpillNNormal(Wstate<2:0>);
941 if(Cansave == 0)
942 {
943 if(Otherwin)
944 fault = new SpillNOther(Wstate<5:3>);
945 else
946 fault = new SpillNNormal(Wstate<2:0>);
955 //Cwp = (Cwp + 2) % NWindows;
956 }
957 else if(Cleanwin - Canrestore == 0)
958 {
947 }
948 else if(Cleanwin - Canrestore == 0)
949 {
959 //Cwp = (Cwp + 1) % NWindows;
960 fault = new CleanWindow;
961 }
962 else
963 {
964 Cwp = (Cwp + 1) % NWindows;
950 fault = new CleanWindow;
951 }
952 else
953 {
954 Cwp = (Cwp + 1) % NWindows;
965 Rd = Rs1 + Rs2_or_imm13;
955 Rd_next = Rs1 + Rs2_or_imm13;
966 Cansave = Cansave - 1;
967 Canrestore = Canrestore + 1;
956 Cansave = Cansave - 1;
957 Canrestore = Canrestore + 1;
968 //This is here to make sure the CWP is written
969 //no matter what. This ensures that the results
970 //are written in the new window as well.
971 xc->setMiscRegWithEffect(MISCREG_CWP, Cwp);
972 }
973 }});
974 0x3D: restore({{
975 if(Canrestore == 0)
976 {
977 if(Otherwin)
978 fault = new FillNOther(Wstate<5:3>);
979 else
980 fault = new FillNNormal(Wstate<2:0>);
981 }
982 else
983 {
958 }
959 }});
960 0x3D: restore({{
961 if(Canrestore == 0)
962 {
963 if(Otherwin)
964 fault = new FillNOther(Wstate<5:3>);
965 else
966 fault = new FillNNormal(Wstate<2:0>);
967 }
968 else
969 {
984 //CWP should be set directly so that it always happens
985 //Also, this will allow writing to the new window and
986 //reading from the old one
987 Cwp = (Cwp - 1 + NWindows) % NWindows;
970 Cwp = (Cwp - 1 + NWindows) % NWindows;
988 Rd = Rs1 + Rs2_or_imm13;
971 Rd_prev = Rs1 + Rs2_or_imm13;
989 Cansave = Cansave + 1;
990 Canrestore = Canrestore - 1;
972 Cansave = Cansave + 1;
973 Canrestore = Canrestore - 1;
991 //This is here to make sure the CWP is written
992 //no matter what. This ensures that the results
993 //are written in the new window as well.
994 xc->setMiscRegWithEffect(MISCREG_CWP, Cwp);
995 }
996 }});
997 0x3E: decode FCN {
998 0x0: Priv::done({{
999 if(Tl == 0)
1000 return new IllegalInstruction;
1001
1002 Cwp = Tstate<4:0>;

--- 284 unchanged lines hidden --- 		974 }
975 }});
976 0x3E: decode FCN {
977 0x0: Priv::done({{
978 if(Tl == 0)
979 return new IllegalInstruction;
980
981 Cwp = Tstate<4:0>;

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