decoder.isa (3587:841cf134f321) | decoder.isa (3598:cf3d84886c9f) |
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1// Copyright (c) 2006 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 27 unchanged lines hidden (view full) --- 36decode OP default Unknown::unknown() 37{ 38 0x0: decode OP2 39 { 40 //Throw an illegal instruction acception 41 0x0: Trap::illtrap({{fault = new IllegalInstruction;}}); 42 format BranchN 43 { | 1// Copyright (c) 2006 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 27 unchanged lines hidden (view full) --- 36decode OP default Unknown::unknown() 37{ 38 0x0: decode OP2 39 { 40 //Throw an illegal instruction acception 41 0x0: Trap::illtrap({{fault = new IllegalInstruction;}}); 42 format BranchN 43 { |
44 //bpcc |
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44 0x1: decode COND2 45 { 46 //Branch Always 47 0x8: decode A 48 { | 45 0x1: decode COND2 46 { 47 //Branch Always 48 0x8: decode A 49 { |
49 0x0: b(19, {{ | 50 0x0: bpa(19, {{ |
50 NNPC = xc->readPC() + disp; 51 }}); | 51 NNPC = xc->readPC() + disp; 52 }}); |
52 0x1: b(19, {{ | 53 0x1: bpa(19, {{ |
53 NPC = xc->readPC() + disp; 54 NNPC = NPC + 4; 55 }}, ',a'); 56 } 57 //Branch Never 58 0x0: decode A 59 { | 54 NPC = xc->readPC() + disp; 55 NNPC = NPC + 4; 56 }}, ',a'); 57 } 58 //Branch Never 59 0x0: decode A 60 { |
60 0x0: bn(19, {{ | 61 0x0: bpn(19, {{ |
61 NNPC = NNPC;//Don't do anything 62 }}); | 62 NNPC = NNPC;//Don't do anything 63 }}); |
63 0x1: bn(19, {{ | 64 0x1: bpn(19, {{ |
64 NPC = xc->readNextPC() + 4; 65 NNPC = NPC + 4; 66 }}, ',a'); 67 } 68 default: decode BPCC 69 { 70 0x0: bpcci(19, {{ 71 if(passesCondition(Ccr<3:0>, COND2)) --- 4 unchanged lines hidden (view full) --- 76 0x2: bpccx(19, {{ 77 if(passesCondition(Ccr<7:4>, COND2)) 78 NNPC = xc->readPC() + disp; 79 else 80 handle_annul 81 }}); 82 } 83 } | 65 NPC = xc->readNextPC() + 4; 66 NNPC = NPC + 4; 67 }}, ',a'); 68 } 69 default: decode BPCC 70 { 71 0x0: bpcci(19, {{ 72 if(passesCondition(Ccr<3:0>, COND2)) --- 4 unchanged lines hidden (view full) --- 77 0x2: bpccx(19, {{ 78 if(passesCondition(Ccr<7:4>, COND2)) 79 NNPC = xc->readPC() + disp; 80 else 81 handle_annul 82 }}); 83 } 84 } |
84 0x2: bicc(22, {{ 85 if(passesCondition(Ccr<3:0>, COND2)) 86 NNPC = xc->readPC() + disp; 87 else 88 handle_annul 89 }}); | 85 //bicc 86 0x2: decode COND2 87 { 88 //Branch Always 89 0x8: decode A 90 { 91 0x0: ba(22, {{ 92 NNPC = xc->readPC() + disp; 93 }}); 94 0x1: ba(22, {{ 95 NPC = xc->readPC() + disp; 96 NNPC = NPC + 4; 97 }}, ',a'); 98 } 99 //Branch Never 100 0x0: decode A 101 { 102 0x0: bn(22, {{ 103 NNPC = NNPC;//Don't do anything 104 }}); 105 0x1: bn(22, {{ 106 NPC = xc->readNextPC() + 4; 107 NNPC = NPC + 4; 108 }}, ',a'); 109 } 110 default: bicc(22, {{ 111 if(passesCondition(Ccr<3:0>, COND2)) 112 NNPC = xc->readPC() + disp; 113 else 114 handle_annul 115 }}); 116 } |
90 } 91 0x3: decode RCOND2 92 { 93 format BranchSplit 94 { 95 0x1: bpreq({{ 96 if(Rs1.sdw == 0) 97 NNPC = xc->readPC() + disp; --- 277 unchanged lines hidden (view full) --- 375 else 376 fault = new FpDisabled; 377 }}); 378 //0x14-0x15 should cause an illegal instruction exception 379 0x16: Priv::rdsoftint({{Rd = Softint;}}); 380 0x17: Priv::rdtick_cmpr({{Rd = TickCmpr;}}); 381 0x18: PrivCheck::rdstick({{Rd = Stick}}, {{Stick<63:>}}); 382 0x19: Priv::rdstick_cmpr({{Rd = StickCmpr;}}); | 117 } 118 0x3: decode RCOND2 119 { 120 format BranchSplit 121 { 122 0x1: bpreq({{ 123 if(Rs1.sdw == 0) 124 NNPC = xc->readPC() + disp; --- 277 unchanged lines hidden (view full) --- 402 else 403 fault = new FpDisabled; 404 }}); 405 //0x14-0x15 should cause an illegal instruction exception 406 0x16: Priv::rdsoftint({{Rd = Softint;}}); 407 0x17: Priv::rdtick_cmpr({{Rd = TickCmpr;}}); 408 0x18: PrivCheck::rdstick({{Rd = Stick}}, {{Stick<63:>}}); 409 0x19: Priv::rdstick_cmpr({{Rd = StickCmpr;}}); |
383 //0x1A-0x1F should cause an illegal instruction exception | 410 0x1A: Priv::rdstrand_sts_reg({{ 411 if(Pstate<2:> && !Hpstate<2:>) 412 Rd = StrandStsReg<0:>; 413 else 414 Rd = StrandStsReg; 415 }}); 416 //0x1A is supposed to be reserved, but it reads the strand 417 //status register. 418 //0x1B-0x1F should cause an illegal instruction exception |
384 } 385 0x29: decode RS1 { 386 0x00: HPriv::rdhprhpstate({{Rd = Hpstate;}}); 387 0x01: HPriv::rdhprhtstate({{ 388 if(Tl == 0) 389 return new IllegalInstruction; 390 Rd = Htstate; 391 }}); --- 118 unchanged lines hidden (view full) --- 510 0x16: Priv::wrsoftint({{Softint = Rs1 ^ Rs2_or_imm13;}}); 511 0x17: Priv::wrtick_cmpr({{TickCmpr = Rs1 ^ Rs2_or_imm13;}}); 512 0x18: NoPriv::wrstick({{ 513 if(!Hpstate<2:>) 514 return new IllegalInstruction; 515 Stick = Rs1 ^ Rs2_or_imm13; 516 }}); 517 0x19: Priv::wrstick_cmpr({{StickCmpr = Rs1 ^ Rs2_or_imm13;}}); | 419 } 420 0x29: decode RS1 { 421 0x00: HPriv::rdhprhpstate({{Rd = Hpstate;}}); 422 0x01: HPriv::rdhprhtstate({{ 423 if(Tl == 0) 424 return new IllegalInstruction; 425 Rd = Htstate; 426 }}); --- 118 unchanged lines hidden (view full) --- 545 0x16: Priv::wrsoftint({{Softint = Rs1 ^ Rs2_or_imm13;}}); 546 0x17: Priv::wrtick_cmpr({{TickCmpr = Rs1 ^ Rs2_or_imm13;}}); 547 0x18: NoPriv::wrstick({{ 548 if(!Hpstate<2:>) 549 return new IllegalInstruction; 550 Stick = Rs1 ^ Rs2_or_imm13; 551 }}); 552 0x19: Priv::wrstick_cmpr({{StickCmpr = Rs1 ^ Rs2_or_imm13;}}); |
518 //0x1A-0x1F should cause an illegal instruction exception | 553 0x1A: Priv::wrstrand_sts_reg({{ 554 if(Pstate<2:> && !Hpstate<2:>) 555 StrandStsReg = StrandStsReg<63:1> | 556 (Rs1 ^ Rs2_or_imm13)<0:>; 557 else 558 StrandStsReg = Rs1 ^ Rs2_or_imm13; 559 }}); 560 //0x1A is supposed to be reserved, but it writes the strand 561 //status register. 562 //0x1B-0x1F should cause an illegal instruction exception |
519 } 520 0x31: decode FCN { 521 0x0: Priv::saved({{ 522 assert(Cansave < NWindows - 2); 523 assert(Otherwin || Canrestore); 524 Cansave = Cansave + 1; 525 if(Otherwin == 0) 526 Canrestore = Canrestore - 1; 527 else 528 Otherwin = Otherwin - 1; 529 }}); | 563 } 564 0x31: decode FCN { 565 0x0: Priv::saved({{ 566 assert(Cansave < NWindows - 2); 567 assert(Otherwin || Canrestore); 568 Cansave = Cansave + 1; 569 if(Otherwin == 0) 570 Canrestore = Canrestore - 1; 571 else 572 Otherwin = Otherwin - 1; 573 }}); |
530 0x1: BasicOperate::restored({{ | 574 0x1: Priv::restored({{ |
531 assert(Cansave || Otherwin); 532 assert(Canrestore < NWindows - 2); 533 Canrestore = Canrestore + 1; 534 if(Otherwin == 0) 535 Cansave = Cansave - 1; 536 else 537 Otherwin = Otherwin - 1; 538 }}); --- 705 unchanged lines hidden --- | 575 assert(Cansave || Otherwin); 576 assert(Canrestore < NWindows - 2); 577 Canrestore = Canrestore + 1; 578 if(Otherwin == 0) 579 Cansave = Cansave - 1; 580 else 581 Otherwin = Otherwin - 1; 582 }}); --- 705 unchanged lines hidden --- |