decoder.isa (3438:d625052ff893) decoder.isa (3439:b35c5f0ff57b)
1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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1067 0xDA: FailUnimpl::stshortf_16pl();
1068 //ASI_FL16_SECONDARY_LITTLE
1069 0xDB: FailUnimpl::stshortf_16sl();
1070 //Not an ASI which is legal with lddfa
1071 default: Trap::stdfa_bad_asi(
1072 {{fault = new DataAccessException;}});
1073 }
1074 }
1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

--- 1058 unchanged lines hidden (view full) ---

1067 0xDA: FailUnimpl::stshortf_16pl();
1068 //ASI_FL16_SECONDARY_LITTLE
1069 0xDB: FailUnimpl::stshortf_16sl();
1070 //Not an ASI which is legal with lddfa
1071 default: Trap::stdfa_bad_asi(
1072 {{fault = new DataAccessException;}});
1073 }
1074 }
1075 0x3C: Cas::casa({{
1076 uint64_t val = Mem.uw;
1077 if(Rs2.uw == val)
1075 0x3C: Cas::casa(
1076 {{uReg0 = Mem.uw;}},
1077 {{if(Rs2.uw == uReg0)
1078 Mem.uw = Rd.uw;
1078 Mem.uw = Rd.uw;
1079 Rd.uw = val;
1080 }});
1079 else
1080 storeCond = false;
1081 Rd.uw = uReg0;}});
1081 0x3D: Nop::prefetcha({{ }});
1082 0x3D: Nop::prefetcha({{ }});
1082 0x3E: Cas::casxa({{
1083 uint64_t val = Mem.udw;
1084 if(Rs2 == val)
1083 0x3E: Cas::casxa(
1084 {{uReg0 = Mem.udw;}},
1085 {{if(Rs2 == uReg0)
1085 Mem.udw = Rd;
1086 Mem.udw = Rd;
1086 Rd = val;
1087 }});
1087 else
1088 storeCond = false;
1089 Rd = uReg0;}});
1088 }
1089 }
1090}
1090 }
1091 }
1092}