decoder.isa (2646:c5f20661d9f3) | decoder.isa (2938:afa2dcabf2ae) |
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1// Copyright (c) 2006 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 311 unchanged lines hidden (view full) --- 320 0x27: decode X { 321 0x0: sra({{Rd = Rs1.sw >> (I ? SHCNT32 : Rs2<4:0>);}}); 322 0x1: srax({{Rd = Rs1.sdw >> (I ? SHCNT64 : Rs2<5:0>);}}); 323 } 324 // XXX might want a format rdipr thing here 325 0x28: rdasr({{ 326 Rd = xc->readMiscRegWithEffect(RS1 + AsrStart, fault); 327 }}); | 1// Copyright (c) 2006 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 311 unchanged lines hidden (view full) --- 320 0x27: decode X { 321 0x0: sra({{Rd = Rs1.sw >> (I ? SHCNT32 : Rs2<4:0>);}}); 322 0x1: srax({{Rd = Rs1.sdw >> (I ? SHCNT64 : Rs2<5:0>);}}); 323 } 324 // XXX might want a format rdipr thing here 325 0x28: rdasr({{ 326 Rd = xc->readMiscRegWithEffect(RS1 + AsrStart, fault); 327 }}); |
328 0x29: rdhpr({{ | 328 0x29: HPriv::rdhpr({{ |
329 // XXX Need to protect with format that traps non-priv/priv 330 // access 331 Rd = xc->readMiscRegWithEffect(RS1 + HprStart, fault); 332 }}); | 329 // XXX Need to protect with format that traps non-priv/priv 330 // access 331 Rd = xc->readMiscRegWithEffect(RS1 + HprStart, fault); 332 }}); |
333 0x2A: rdpr({{ | 333 0x2A: Priv::rdpr({{ |
334 // XXX Need to protect with format that traps non-priv 335 // access 336 Rd = xc->readMiscRegWithEffect(RS1 + PrStart, fault); 337 }}); 338 0x2B: BasicOperate::flushw({{ 339 if(NWindows - 2 - Cansave == 0) 340 { 341 if(Otherwin) --- 50 unchanged lines hidden (view full) --- 392 } 393 0x30: wrasr({{ 394 xc->setMiscRegWithEffect(RD + AsrStart, Rs1 ^ Rs2_or_imm13); 395 }}); 396 0x31: decode FCN { 397 0x0: BasicOperate::saved({{/*Boogy Boogy*/}}); 398 0x1: BasicOperate::restored({{/*Boogy Boogy*/}}); 399 } | 334 // XXX Need to protect with format that traps non-priv 335 // access 336 Rd = xc->readMiscRegWithEffect(RS1 + PrStart, fault); 337 }}); 338 0x2B: BasicOperate::flushw({{ 339 if(NWindows - 2 - Cansave == 0) 340 { 341 if(Otherwin) --- 50 unchanged lines hidden (view full) --- 392 } 393 0x30: wrasr({{ 394 xc->setMiscRegWithEffect(RD + AsrStart, Rs1 ^ Rs2_or_imm13); 395 }}); 396 0x31: decode FCN { 397 0x0: BasicOperate::saved({{/*Boogy Boogy*/}}); 398 0x1: BasicOperate::restored({{/*Boogy Boogy*/}}); 399 } |
400 0x32: wrpr({{ | 400 0x32: Priv::wrpr({{ |
401 // XXX Need to protect with format that traps non-priv 402 // access | 401 // XXX Need to protect with format that traps non-priv 402 // access |
403 xc->setMiscRegWithEffect(RD + PrStart, Rs1 ^ Rs2_or_imm13); | 403 fault = xc->setMiscRegWithEffect(RD + PrStart, Rs1 ^ Rs2_or_imm13); |
404 }}); | 404 }}); |
405 0x33: wrhpr({{ | 405 0x33: HPriv::wrhpr({{ |
406 // XXX Need to protect with format that traps non-priv/priv 407 // access | 406 // XXX Need to protect with format that traps non-priv/priv 407 // access |
408 xc->setMiscRegWithEffect(RD + HprStart, Rs1 ^ Rs2_or_imm13); | 408 fault = xc->setMiscRegWithEffect(RD + HprStart, Rs1 ^ Rs2_or_imm13); |
409 }}); 410 0x34: Trap::fpop1({{fault = new FpDisabled;}}); 411 0x35: Trap::fpop2({{fault = new FpDisabled;}}); 412 0x38: Branch::jmpl({{ 413 Addr target = Rs1 + Rs2_or_imm13; 414 if(target & 0x3) 415 fault = new MemAddressNotAligned; 416 else --- 127 unchanged lines hidden (view full) --- 544 Pstate = Tstate<20:8>; 545 Asi = Tstate<31:24>; 546 Ccr = Tstate<39:32>; 547 Gl = Tstate<42:40>; 548 NPC = Tnpc; 549 NNPC = Tnpc + 4; 550 Tl = Tl - 1; 551 }}); | 409 }}); 410 0x34: Trap::fpop1({{fault = new FpDisabled;}}); 411 0x35: Trap::fpop2({{fault = new FpDisabled;}}); 412 0x38: Branch::jmpl({{ 413 Addr target = Rs1 + Rs2_or_imm13; 414 if(target & 0x3) 415 fault = new MemAddressNotAligned; 416 else --- 127 unchanged lines hidden (view full) --- 544 Pstate = Tstate<20:8>; 545 Asi = Tstate<31:24>; 546 Ccr = Tstate<39:32>; 547 Gl = Tstate<42:40>; 548 NPC = Tnpc; 549 NNPC = Tnpc + 4; 550 Tl = Tl - 1; 551 }}); |
552 0x1: BasicOperate::retry({{ | 552 0x1: Priv::retry({{ |
553 if(Tl == 0) 554 return new IllegalInstruction; 555 Cwp = Tstate<4:0>; 556 Pstate = Tstate<20:8>; 557 Asi = Tstate<31:24>; 558 Ccr = Tstate<39:32>; 559 Gl = Tstate<42:40>; 560 NPC = Tpc; --- 109 unchanged lines hidden --- | 553 if(Tl == 0) 554 return new IllegalInstruction; 555 Cwp = Tstate<4:0>; 556 Pstate = Tstate<20:8>; 557 Asi = Tstate<31:24>; 558 Ccr = Tstate<39:32>; 559 Gl = Tstate<42:40>; 560 NPC = Tpc; --- 109 unchanged lines hidden --- |