decoder.isa (2632:1bb2f91485ea) | decoder.isa (2646:c5f20661d9f3) |
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1// Copyright (c) 2006 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 30 unchanged lines hidden (view full) --- 39 { 40 //Throw an illegal instruction acception 41 0x0: Trap::illtrap({{fault = new IllegalInstruction;}}); 42 0x1: decode BPCC 43 { 44 format Branch19 45 { 46 0x0: bpcci({{ | 1// Copyright (c) 2006 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 30 unchanged lines hidden (view full) --- 39 { 40 //Throw an illegal instruction acception 41 0x0: Trap::illtrap({{fault = new IllegalInstruction;}}); 42 0x1: decode BPCC 43 { 44 format Branch19 45 { 46 0x0: bpcci({{ |
47 if(passesCondition(CcrIcc, COND2)) | 47 if(passesCondition(Ccr<3:0>, COND2)) |
48 NNPC = xc->readPC() + disp; 49 else 50 handle_annul 51 }}); 52 0x2: bpccx({{ | 48 NNPC = xc->readPC() + disp; 49 else 50 handle_annul 51 }}); 52 0x2: bpccx({{ |
53 if(passesCondition(CcrXcc, COND2)) | 53 if(passesCondition(Ccr<7:4>, COND2)) |
54 NNPC = xc->readPC() + disp; 55 else 56 handle_annul 57 }}); 58 } 59 } 60 0x2: Branch22::bicc({{ | 54 NNPC = xc->readPC() + disp; 55 else 56 handle_annul 57 }}); 58 } 59 } 60 0x2: Branch22::bicc({{ |
61 if(passesCondition(CcrIcc, COND2)) | 61 if(passesCondition(Ccr<3:0>, COND2)) |
62 NNPC = xc->readPC() + disp; 63 else 64 handle_annul 65 }}); 66 0x3: decode RCOND2 67 { 68 format BranchSplit 69 { --- 49 unchanged lines hidden (view full) --- 119 0x00: add({{Rd = Rs1.sdw + Rs2_or_imm13;}}); 120 0x01: and({{Rd = Rs1.udw & Rs2_or_imm13;}}); 121 0x02: or({{Rd = Rs1.udw | Rs2_or_imm13;}}); 122 0x03: xor({{Rd = Rs1.udw ^ Rs2_or_imm13;}}); 123 0x04: sub({{Rd = Rs1.sdw - Rs2_or_imm13;}}); 124 0x05: andn({{Rd = Rs1.udw & ~Rs2_or_imm13;}}); 125 0x06: orn({{Rd = Rs1.udw | ~Rs2_or_imm13;}}); 126 0x07: xnor({{Rd = ~(Rs1.udw ^ Rs2_or_imm13);}}); | 62 NNPC = xc->readPC() + disp; 63 else 64 handle_annul 65 }}); 66 0x3: decode RCOND2 67 { 68 format BranchSplit 69 { --- 49 unchanged lines hidden (view full) --- 119 0x00: add({{Rd = Rs1.sdw + Rs2_or_imm13;}}); 120 0x01: and({{Rd = Rs1.udw & Rs2_or_imm13;}}); 121 0x02: or({{Rd = Rs1.udw | Rs2_or_imm13;}}); 122 0x03: xor({{Rd = Rs1.udw ^ Rs2_or_imm13;}}); 123 0x04: sub({{Rd = Rs1.sdw - Rs2_or_imm13;}}); 124 0x05: andn({{Rd = Rs1.udw & ~Rs2_or_imm13;}}); 125 0x06: orn({{Rd = Rs1.udw | ~Rs2_or_imm13;}}); 126 0x07: xnor({{Rd = ~(Rs1.udw ^ Rs2_or_imm13);}}); |
127 0x08: addc({{Rd = Rs1.sdw + Rs2_or_imm13 + CcrIccC;}}); | 127 0x08: addc({{Rd = Rs1.sdw + Rs2_or_imm13 + Ccr<0:0>;}}); |
128 0x09: mulx({{Rd = Rs1 * Rs2_or_imm13;}}); 129 0x0A: umul({{ 130 Rd = Rs1.udw<31:0> * Rs2_or_imm13<31:0>; | 128 0x09: mulx({{Rd = Rs1 * Rs2_or_imm13;}}); 129 0x0A: umul({{ 130 Rd = Rs1.udw<31:0> * Rs2_or_imm13<31:0>; |
131 YValue = Rd<63:32>; | 131 Y = Rd<63:32>; |
132 }}); 133 0x0B: smul({{ 134 Rd.sdw = Rs1.sdw<31:0> * Rs2_or_imm13<31:0>; | 132 }}); 133 0x0B: smul({{ 134 Rd.sdw = Rs1.sdw<31:0> * Rs2_or_imm13<31:0>; |
135 YValue = Rd.sdw; | 135 Y = Rd.sdw; |
136 }}); | 136 }}); |
137 0x0C: subc({{Rd.sdw = Rs1.sdw + (~Rs2_or_imm13) + 1 + CcrIccC;}}); | 137 0x0C: subc({{Rd.sdw = Rs1.sdw + (~Rs2_or_imm13) + 1 + Ccr<0:0>}}); |
138 0x0D: udivx({{ 139 if(Rs2_or_imm13 == 0) fault = new DivisionByZero; 140 else Rd.udw = Rs1.udw / Rs2_or_imm13; 141 }}); 142 0x0E: udiv({{ 143 if(Rs2_or_imm13 == 0) fault = new DivisionByZero; 144 else 145 { | 138 0x0D: udivx({{ 139 if(Rs2_or_imm13 == 0) fault = new DivisionByZero; 140 else Rd.udw = Rs1.udw / Rs2_or_imm13; 141 }}); 142 0x0E: udiv({{ 143 if(Rs2_or_imm13 == 0) fault = new DivisionByZero; 144 else 145 { |
146 Rd.udw = ((YValue << 32) | Rs1.udw<31:0>) / Rs2_or_imm13; | 146 Rd.udw = ((Y << 32) | Rs1.udw<31:0>) / Rs2_or_imm13; |
147 if(Rd.udw >> 32 != 0) 148 Rd.udw = 0xFFFFFFFF; 149 } 150 }}); 151 0x0F: sdiv({{ 152 if(Rs2_or_imm13.sdw == 0) 153 fault = new DivisionByZero; 154 else 155 { | 147 if(Rd.udw >> 32 != 0) 148 Rd.udw = 0xFFFFFFFF; 149 } 150 }}); 151 0x0F: sdiv({{ 152 if(Rs2_or_imm13.sdw == 0) 153 fault = new DivisionByZero; 154 else 155 { |
156 Rd.udw = ((int64_t)((YValue << 32) | Rs1.sdw<31:0>)) / Rs2_or_imm13.sdw; | 156 Rd.udw = ((int64_t)((Y << 32) | Rs1.sdw<31:0>)) / Rs2_or_imm13.sdw; |
157 if(Rd.udw<63:31> != 0) 158 Rd.udw = 0x7FFFFFFF; 159 else if(Rd.udw<63:> && Rd.udw<62:31> != 0xFFFFFFFF) 160 Rd.udw = 0xFFFFFFFF80000000ULL; 161 } 162 }}); 163 } 164 format IntOpCc { --- 17 unchanged lines hidden (view full) --- 182 (Rs1 | ~val2)<0:>))<63:>}}, 183 {{Rs1<63:> != val2<63:> && Rs1<63:> != Rd<63:>}} 184 ); 185 0x15: IntOpCcRes::andncc({{Rd = Rs1 & ~Rs2_or_imm13;}}); 186 0x16: IntOpCcRes::orncc({{Rd = Rs1 | ~Rs2_or_imm13;}}); 187 0x17: IntOpCcRes::xnorcc({{Rd = ~(Rs1 ^ Rs2_or_imm13);}}); 188 0x18: addccc({{ 189 int64_t resTemp, val2 = Rs2_or_imm13; | 157 if(Rd.udw<63:31> != 0) 158 Rd.udw = 0x7FFFFFFF; 159 else if(Rd.udw<63:> && Rd.udw<62:31> != 0xFFFFFFFF) 160 Rd.udw = 0xFFFFFFFF80000000ULL; 161 } 162 }}); 163 } 164 format IntOpCc { --- 17 unchanged lines hidden (view full) --- 182 (Rs1 | ~val2)<0:>))<63:>}}, 183 {{Rs1<63:> != val2<63:> && Rs1<63:> != Rd<63:>}} 184 ); 185 0x15: IntOpCcRes::andncc({{Rd = Rs1 & ~Rs2_or_imm13;}}); 186 0x16: IntOpCcRes::orncc({{Rd = Rs1 | ~Rs2_or_imm13;}}); 187 0x17: IntOpCcRes::xnorcc({{Rd = ~(Rs1 ^ Rs2_or_imm13);}}); 188 0x18: addccc({{ 189 int64_t resTemp, val2 = Rs2_or_imm13; |
190 int64_t carryin = CcrIccC; | 190 int64_t carryin = Ccr<0:0>; |
191 Rd = resTemp = Rs1 + val2 + carryin;}}, 192 {{(Rs1<31:0> + val2<31:0> + carryin)<32:>}}, 193 {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}}, 194 {{(Rs1<63:1> + val2<63:1> + 195 ((Rs1 & val2) | (carryin & (Rs1 | val2)))<0:>)<63:>}}, 196 {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 197 ); 198 0x1A: umulcc({{ 199 uint64_t resTemp; 200 Rd = resTemp = Rs1.udw<31:0> * Rs2_or_imm13.udw<31:0>; | 191 Rd = resTemp = Rs1 + val2 + carryin;}}, 192 {{(Rs1<31:0> + val2<31:0> + carryin)<32:>}}, 193 {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}}, 194 {{(Rs1<63:1> + val2<63:1> + 195 ((Rs1 & val2) | (carryin & (Rs1 | val2)))<0:>)<63:>}}, 196 {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 197 ); 198 0x1A: umulcc({{ 199 uint64_t resTemp; 200 Rd = resTemp = Rs1.udw<31:0> * Rs2_or_imm13.udw<31:0>; |
201 YValue = resTemp<63:32>;}}, | 201 Y = resTemp<63:32>;}}, |
202 {{0}},{{0}},{{0}},{{0}}); 203 0x1B: smulcc({{ 204 int64_t resTemp; 205 Rd = resTemp = Rs1.sdw<31:0> * Rs2_or_imm13.sdw<31:0>; | 202 {{0}},{{0}},{{0}},{{0}}); 203 0x1B: smulcc({{ 204 int64_t resTemp; 205 Rd = resTemp = Rs1.sdw<31:0> * Rs2_or_imm13.sdw<31:0>; |
206 YValue = resTemp<63:32>;}}, | 206 Y = resTemp<63:32>;}}, |
207 {{0}},{{0}},{{0}},{{0}}); 208 0x1C: subccc({{ 209 int64_t resTemp, val2 = Rs2_or_imm13; | 207 {{0}},{{0}},{{0}},{{0}}); 208 0x1C: subccc({{ 209 int64_t resTemp, val2 = Rs2_or_imm13; |
210 int64_t carryin = CcrIccC; | 210 int64_t carryin = Ccr<0:0>; |
211 Rd = resTemp = Rs1 + ~(val2 + carryin) + 1;}}, 212 {{(~((Rs1<31:0> + (~(val2 + carryin))<31:0> + 1))<32:>)}}, 213 {{Rs1<31:> != val2<31:> && Rs1<31:> != resTemp<31:>}}, 214 {{(~((Rs1<63:1> + (~(val2 + carryin))<63:1>) + (Rs1<0:> + (~(val2+carryin))<0:> + 1)<63:1>))<63:>}}, 215 {{Rs1<63:> != val2<63:> && Rs1<63:> != resTemp<63:>}} 216 ); 217 0x1D: udivxcc({{ 218 if(Rs2_or_imm13.udw == 0) fault = new DivisionByZero; 219 else Rd = Rs1.udw / Rs2_or_imm13.udw;}} 220 ,{{0}},{{0}},{{0}},{{0}}); 221 0x1E: udivcc({{ 222 uint32_t resTemp, val2 = Rs2_or_imm13.udw; 223 int32_t overflow; 224 if(val2 == 0) fault = new DivisionByZero; 225 else 226 { | 211 Rd = resTemp = Rs1 + ~(val2 + carryin) + 1;}}, 212 {{(~((Rs1<31:0> + (~(val2 + carryin))<31:0> + 1))<32:>)}}, 213 {{Rs1<31:> != val2<31:> && Rs1<31:> != resTemp<31:>}}, 214 {{(~((Rs1<63:1> + (~(val2 + carryin))<63:1>) + (Rs1<0:> + (~(val2+carryin))<0:> + 1)<63:1>))<63:>}}, 215 {{Rs1<63:> != val2<63:> && Rs1<63:> != resTemp<63:>}} 216 ); 217 0x1D: udivxcc({{ 218 if(Rs2_or_imm13.udw == 0) fault = new DivisionByZero; 219 else Rd = Rs1.udw / Rs2_or_imm13.udw;}} 220 ,{{0}},{{0}},{{0}},{{0}}); 221 0x1E: udivcc({{ 222 uint32_t resTemp, val2 = Rs2_or_imm13.udw; 223 int32_t overflow; 224 if(val2 == 0) fault = new DivisionByZero; 225 else 226 { |
227 resTemp = (uint64_t)((YValue << 32) | Rs1.udw<31:0>) / val2; | 227 resTemp = (uint64_t)((Y << 32) | Rs1.udw<31:0>) / val2; |
228 overflow = (resTemp<63:32> != 0); 229 if(overflow) Rd = resTemp = 0xFFFFFFFF; 230 else Rd = resTemp; 231 } }}, 232 {{0}}, 233 {{overflow}}, 234 {{0}}, 235 {{0}} 236 ); 237 0x1F: sdivcc({{ 238 int32_t resTemp, val2 = Rs2_or_imm13.sdw; 239 int32_t overflow, underflow; 240 if(val2 == 0) fault = new DivisionByZero; 241 else 242 { | 228 overflow = (resTemp<63:32> != 0); 229 if(overflow) Rd = resTemp = 0xFFFFFFFF; 230 else Rd = resTemp; 231 } }}, 232 {{0}}, 233 {{overflow}}, 234 {{0}}, 235 {{0}} 236 ); 237 0x1F: sdivcc({{ 238 int32_t resTemp, val2 = Rs2_or_imm13.sdw; 239 int32_t overflow, underflow; 240 if(val2 == 0) fault = new DivisionByZero; 241 else 242 { |
243 Rd = resTemp = (int64_t)((YValue << 32) | Rs1.sdw<31:0>) / val2; | 243 Rd = resTemp = (int64_t)((Y << 32) | Rs1.sdw<31:0>) / val2; |
244 overflow = (resTemp<63:31> != 0); 245 underflow = (resTemp<63:> && resTemp<62:31> != 0xFFFFFFFF); 246 if(overflow) Rd = resTemp = 0x7FFFFFFF; 247 else if(underflow) Rd = resTemp = 0xFFFFFFFF80000000ULL; 248 else Rd = resTemp; 249 } }}, 250 {{0}}, 251 {{overflow || underflow}}, --- 38 unchanged lines hidden (view full) --- 290 {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 291 {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 292 ); 293 0x24: mulscc({{ 294 int64_t resTemp, multiplicand = Rs2_or_imm13; 295 int32_t multiplier = Rs1<31:0>; 296 int32_t savedLSB = Rs1<0:>; 297 multiplier = multiplier<31:1> | | 244 overflow = (resTemp<63:31> != 0); 245 underflow = (resTemp<63:> && resTemp<62:31> != 0xFFFFFFFF); 246 if(overflow) Rd = resTemp = 0x7FFFFFFF; 247 else if(underflow) Rd = resTemp = 0xFFFFFFFF80000000ULL; 248 else Rd = resTemp; 249 } }}, 250 {{0}}, 251 {{overflow || underflow}}, --- 38 unchanged lines hidden (view full) --- 290 {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 291 {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 292 ); 293 0x24: mulscc({{ 294 int64_t resTemp, multiplicand = Rs2_or_imm13; 295 int32_t multiplier = Rs1<31:0>; 296 int32_t savedLSB = Rs1<0:>; 297 multiplier = multiplier<31:1> | |
298 ((CcrIccN 299 ^ CcrIccV) << 32); 300 if(!YValue<0:>) | 298 ((Ccr<3:3> 299 ^ Ccr<1:1>) << 32); 300 if(!Y<0:>) |
301 multiplicand = 0; 302 Rd = resTemp = multiplicand + multiplier; | 301 multiplicand = 0; 302 Rd = resTemp = multiplicand + multiplier; |
303 YValue = YValue<31:1> | (savedLSB << 31);}}, | 303 Y = Y<31:1> | (savedLSB << 31);}}, |
304 {{((multiplicand & 0xFFFFFFFF + multiplier & 0xFFFFFFFF) >> 31)}}, 305 {{multiplicand<31:> == multiplier<31:> && multiplier<31:> != resTemp<31:>}}, 306 {{((multiplicand >> 1) + (multiplier >> 1) + (multiplicand & multiplier & 0x1))<63:>}}, 307 {{multiplicand<63:> == multiplier<63:> && multiplier<63:> != resTemp<63:>}} 308 ); 309 } 310 format IntOp 311 { --- 4 unchanged lines hidden (view full) --- 316 0x26: decode X { 317 0x0: srl({{Rd = Rs1.uw >> (I ? SHCNT32 : Rs2<4:0>);}}); 318 0x1: srlx({{Rd = Rs1.udw >> (I ? SHCNT64 : Rs2<5:0>);}}); 319 } 320 0x27: decode X { 321 0x0: sra({{Rd = Rs1.sw >> (I ? SHCNT32 : Rs2<4:0>);}}); 322 0x1: srax({{Rd = Rs1.sdw >> (I ? SHCNT64 : Rs2<5:0>);}}); 323 } | 304 {{((multiplicand & 0xFFFFFFFF + multiplier & 0xFFFFFFFF) >> 31)}}, 305 {{multiplicand<31:> == multiplier<31:> && multiplier<31:> != resTemp<31:>}}, 306 {{((multiplicand >> 1) + (multiplier >> 1) + (multiplicand & multiplier & 0x1))<63:>}}, 307 {{multiplicand<63:> == multiplier<63:> && multiplier<63:> != resTemp<63:>}} 308 ); 309 } 310 format IntOp 311 { --- 4 unchanged lines hidden (view full) --- 316 0x26: decode X { 317 0x0: srl({{Rd = Rs1.uw >> (I ? SHCNT32 : Rs2<4:0>);}}); 318 0x1: srlx({{Rd = Rs1.udw >> (I ? SHCNT64 : Rs2<5:0>);}}); 319 } 320 0x27: decode X { 321 0x0: sra({{Rd = Rs1.sw >> (I ? SHCNT32 : Rs2<4:0>);}}); 322 0x1: srax({{Rd = Rs1.sdw >> (I ? SHCNT64 : Rs2<5:0>);}}); 323 } |
324 0x28: decode RS1 { 325 0x0: rdy({{Rd = YValue;}}); 326 0x2: rdccr({{Rd = Ccr;}}); 327 0x3: rdasi({{Rd = Asi;}}); 328 0x4: PrivTick::rdtick({{Rd = Tick;}}); 329 0x5: rdpc({{Rd = xc->readPC();}}); 330 0x6: rdfprs({{Rd = Fprs;}}); 331 0xF: decode I { 332 0x0: Nop::membar({{/*Membar isn't needed yet*/}}); 333 0x1: Nop::stbar({{/*Stbar isn't needed yet*/}}); 334 } 335 } 336 0x2A: decode RS1 { 337 format Priv 338 { 339 0x0: rdprtpc({{ 340 Rd = xc->readMiscReg(MISCREG_TPC_BASE + Tl); 341 }}); 342 0x1: rdprtnpc({{ 343 Rd = xc->readMiscReg(MISCREG_TNPC_BASE + Tl); 344 }}); 345 0x2: rdprtstate({{ 346 Rd = xc->readMiscReg(MISCREG_TSTATE_BASE + Tl); 347 }}); 348 0x3: rdprtt({{ 349 Rd = xc->readMiscReg(MISCREG_TT_BASE + Tl); 350 }}); 351 0x4: rdprtick({{Rd = Tick;}}); 352 0x5: rdprtba({{Rd = Tba;}}); 353 0x6: rdprpstate({{Rd = Pstate;}}); 354 0x7: rdprtl({{Rd = Tl;}}); 355 0x8: rdprpil({{Rd = Pil;}}); 356 0x9: rdprcwp({{Rd = Cwp;}}); 357 0xA: rdprcansave({{Rd = Cansave;}}); 358 0xB: rdprcanrestore({{Rd = Canrestore;}}); 359 0xC: rdprcleanwin({{Rd = Cleanwin;}}); 360 0xD: rdprotherwin({{Rd = Otherwin;}}); 361 0xE: rdprwstate({{Rd = Wstate;}}); 362 } 363 //The floating point queue isn't implemented right now. 364 0xF: Trap::rdprfq({{fault = new IllegalInstruction;}}); 365 0x1F: Priv::rdprver({{Rd = Ver;}}); 366 } | 324 // XXX might want a format rdipr thing here 325 0x28: rdasr({{ 326 Rd = xc->readMiscRegWithEffect(RS1 + AsrStart, fault); 327 }}); 328 0x29: rdhpr({{ 329 // XXX Need to protect with format that traps non-priv/priv 330 // access 331 Rd = xc->readMiscRegWithEffect(RS1 + HprStart, fault); 332 }}); 333 0x2A: rdpr({{ 334 // XXX Need to protect with format that traps non-priv 335 // access 336 Rd = xc->readMiscRegWithEffect(RS1 + PrStart, fault); 337 }}); |
367 0x2B: BasicOperate::flushw({{ 368 if(NWindows - 2 - Cansave == 0) 369 { 370 if(Otherwin) | 338 0x2B: BasicOperate::flushw({{ 339 if(NWindows - 2 - Cansave == 0) 340 { 341 if(Otherwin) |
371 fault = new SpillNOther(WstateOther); | 342 fault = new SpillNOther(Wstate<5:3>); |
372 else | 343 else |
373 fault = new SpillNNormal(WstateNormal); | 344 fault = new SpillNNormal(Wstate<2:0>); |
374 } 375 }}); 376 0x2C: decode MOVCC3 377 { 378 0x0: Trap::movccfcc({{fault = new FpDisabled;}}); 379 0x1: decode CC 380 { 381 0x0: movcci({{ | 345 } 346 }}); 347 0x2C: decode MOVCC3 348 { 349 0x0: Trap::movccfcc({{fault = new FpDisabled;}}); 350 0x1: decode CC 351 { 352 0x0: movcci({{ |
382 if(passesCondition(CcrIcc, COND4)) | 353 if(passesCondition(Ccr<3:0>, COND4)) |
383 Rd = Rs2_or_imm11; 384 else 385 Rd = Rd; 386 }}); 387 0x2: movccx({{ | 354 Rd = Rs2_or_imm11; 355 else 356 Rd = Rd; 357 }}); 358 0x2: movccx({{ |
388 if(passesCondition(CcrXcc, COND4)) | 359 if(passesCondition(Ccr<7:4>, COND4)) |
389 Rd = Rs2_or_imm11; 390 else 391 Rd = Rd; 392 }}); 393 } 394 } 395 0x2D: sdivx({{ 396 if(Rs2_or_imm13.sdw == 0) fault = new DivisionByZero; --- 17 unchanged lines hidden (view full) --- 414 { 415 0x1: movreq({{Rd = (Rs1.sdw == 0) ? Rs2_or_imm10 : Rd;}}); 416 0x2: movrle({{Rd = (Rs1.sdw <= 0) ? Rs2_or_imm10 : Rd;}}); 417 0x3: movrl({{Rd = (Rs1.sdw < 0) ? Rs2_or_imm10 : Rd;}}); 418 0x5: movrne({{Rd = (Rs1.sdw != 0) ? Rs2_or_imm10 : Rd;}}); 419 0x6: movrg({{Rd = (Rs1.sdw > 0) ? Rs2_or_imm10 : Rd;}}); 420 0x7: movrge({{Rd = (Rs1.sdw >= 0) ? Rs2_or_imm10 : Rd;}}); 421 } | 360 Rd = Rs2_or_imm11; 361 else 362 Rd = Rd; 363 }}); 364 } 365 } 366 0x2D: sdivx({{ 367 if(Rs2_or_imm13.sdw == 0) fault = new DivisionByZero; --- 17 unchanged lines hidden (view full) --- 385 { 386 0x1: movreq({{Rd = (Rs1.sdw == 0) ? Rs2_or_imm10 : Rd;}}); 387 0x2: movrle({{Rd = (Rs1.sdw <= 0) ? Rs2_or_imm10 : Rd;}}); 388 0x3: movrl({{Rd = (Rs1.sdw < 0) ? Rs2_or_imm10 : Rd;}}); 389 0x5: movrne({{Rd = (Rs1.sdw != 0) ? Rs2_or_imm10 : Rd;}}); 390 0x6: movrg({{Rd = (Rs1.sdw > 0) ? Rs2_or_imm10 : Rd;}}); 391 0x7: movrge({{Rd = (Rs1.sdw >= 0) ? Rs2_or_imm10 : Rd;}}); 392 } |
422 0x30: decode RD { 423 0x0: wry({{Y = Rs1 ^ Rs2_or_imm13;}}); 424 0x2: wrccr({{Ccr = Rs1 ^ Rs2_or_imm13;}}); 425 0x3: wrasi({{Asi = Rs1 ^ Rs2_or_imm13;}}); 426 0x6: wrfprs({{Asi = Rs1 ^ Rs2_or_imm13;}}); 427 0xF: Trap::sir({{fault = new SoftwareInitiatedReset;}}); 428 } | 393 0x30: wrasr({{ 394 xc->setMiscRegWithEffect(RD + AsrStart, Rs1 ^ Rs2_or_imm13); 395 }}); |
429 0x31: decode FCN { 430 0x0: BasicOperate::saved({{/*Boogy Boogy*/}}); 431 0x1: BasicOperate::restored({{/*Boogy Boogy*/}}); 432 } | 396 0x31: decode FCN { 397 0x0: BasicOperate::saved({{/*Boogy Boogy*/}}); 398 0x1: BasicOperate::restored({{/*Boogy Boogy*/}}); 399 } |
433 0x32: decode RD { 434 format Priv 435 { 436 0x0: wrprtpc({{ 437 xc->setMiscReg(MISCREG_TPC_BASE + Tl, 438 Rs1 ^ Rs2_or_imm13); 439 }}); 440 0x1: wrprtnpc({{ 441 xc->setMiscReg(MISCREG_TNPC_BASE + Tl, 442 Rs1 ^ Rs2_or_imm13); 443 }}); 444 0x2: wrprtstate({{ 445 xc->setMiscReg(MISCREG_TSTATE_BASE + Tl, 446 Rs1 ^ Rs2_or_imm13); 447 }}); 448 0x3: wrprtt({{ 449 xc->setMiscReg(MISCREG_TT_BASE + Tl, 450 Rs1 ^ Rs2_or_imm13); 451 }}); 452 0x4: wrprtick({{Tick = Rs1 ^ Rs2_or_imm13;}}); 453 0x5: wrprtba({{Tba = Rs1 ^ Rs2_or_imm13;}}); 454 0x6: wrprpstate({{Pstate = Rs1 ^ Rs2_or_imm13;}}); 455 0x7: wrprtl({{Tl = Rs1 ^ Rs2_or_imm13;}}); 456 0x8: wrprpil({{Pil = Rs1 ^ Rs2_or_imm13;}}); 457 0x9: wrprcwp({{Cwp = Rs1 ^ Rs2_or_imm13;}}); 458 0xA: wrprcansave({{Cansave = Rs1 ^ Rs2_or_imm13;}}); 459 0xB: wrprcanrestore({{Canrestore = Rs1 ^ Rs2_or_imm13;}}); 460 0xC: wrprcleanwin({{Cleanwin = Rs1 ^ Rs2_or_imm13;}}); 461 0xD: wrprotherwin({{Otherwin = Rs1 ^ Rs2_or_imm13;}}); 462 0xE: wrprwstate({{Wstate = Rs1 ^ Rs2_or_imm13;}}); 463 } 464 } | 400 0x32: wrpr({{ 401 // XXX Need to protect with format that traps non-priv 402 // access 403 xc->setMiscRegWithEffect(RD + PrStart, Rs1 ^ Rs2_or_imm13); 404 }}); 405 0x33: wrhpr({{ 406 // XXX Need to protect with format that traps non-priv/priv 407 // access 408 xc->setMiscRegWithEffect(RD + HprStart, Rs1 ^ Rs2_or_imm13); 409 }}); |
465 0x34: Trap::fpop1({{fault = new FpDisabled;}}); 466 0x35: Trap::fpop2({{fault = new FpDisabled;}}); 467 0x38: Branch::jmpl({{ 468 Addr target = Rs1 + Rs2_or_imm13; 469 if(target & 0x3) 470 fault = new MemAddressNotAligned; 471 else 472 { --- 14 unchanged lines hidden (view full) --- 487 { 488 //CWP should be set directly so that it always happens 489 //Also, this will allow writing to the new window and 490 //reading from the old one 491 Cwp = (Cwp - 1 + NWindows) % NWindows; 492 if(Canrestore == 0) 493 { 494 if(Otherwin) | 410 0x34: Trap::fpop1({{fault = new FpDisabled;}}); 411 0x35: Trap::fpop2({{fault = new FpDisabled;}}); 412 0x38: Branch::jmpl({{ 413 Addr target = Rs1 + Rs2_or_imm13; 414 if(target & 0x3) 415 fault = new MemAddressNotAligned; 416 else 417 { --- 14 unchanged lines hidden (view full) --- 432 { 433 //CWP should be set directly so that it always happens 434 //Also, this will allow writing to the new window and 435 //reading from the old one 436 Cwp = (Cwp - 1 + NWindows) % NWindows; 437 if(Canrestore == 0) 438 { 439 if(Otherwin) |
495 fault = new FillNOther(WstateOther); | 440 fault = new FillNOther(Wstate<5:3>); |
496 else | 441 else |
497 fault = new FillNNormal(WstateNormal); | 442 fault = new FillNNormal(Wstate<2:0>); |
498 } 499 else 500 { 501 Rd = Rs1 + Rs2_or_imm13; 502 Cansave = Cansave + 1; 503 Canrestore = Canrestore - 1; 504 } 505 //This is here to make sure the CWP is written 506 //no matter what. This ensures that the results 507 //are written in the new window as well. 508 xc->setMiscRegWithEffect(MISCREG_CWP, Cwp); 509 } 510 }}); 511 0x3A: decode CC 512 { 513 0x0: Trap::tcci({{ | 443 } 444 else 445 { 446 Rd = Rs1 + Rs2_or_imm13; 447 Cansave = Cansave + 1; 448 Canrestore = Canrestore - 1; 449 } 450 //This is here to make sure the CWP is written 451 //no matter what. This ensures that the results 452 //are written in the new window as well. 453 xc->setMiscRegWithEffect(MISCREG_CWP, Cwp); 454 } 455 }}); 456 0x3A: decode CC 457 { 458 0x0: Trap::tcci({{ |
514 if(passesCondition(CcrIcc, COND2)) | 459 if(passesCondition(Ccr<3:0>, COND2)) |
515 { 516 int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 517 DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 518#if FULL_SYSTEM 519 fault = new TrapInstruction(lTrapNum); 520#else 521 DPRINTF(Sparc, "The syscall number is %d\n", R1); 522 xc->syscall(R1); 523#endif 524 } 525 }}); 526 0x2: Trap::tccx({{ | 460 { 461 int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 462 DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 463#if FULL_SYSTEM 464 fault = new TrapInstruction(lTrapNum); 465#else 466 DPRINTF(Sparc, "The syscall number is %d\n", R1); 467 xc->syscall(R1); 468#endif 469 } 470 }}); 471 0x2: Trap::tccx({{ |
527 if(passesCondition(CcrXcc, COND2)) | 472 if(passesCondition(Ccr<7:4>, COND2)) |
528 { 529 int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 530 DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 531#if FULL_SYSTEM 532 fault = new TrapInstruction(lTrapNum); 533#else 534 DPRINTF(Sparc, "The syscall number is %d\n", R1); 535 xc->syscall(R1); --- 4 unchanged lines hidden (view full) --- 540 0x3B: Nop::flush({{/*Instruction memory flush*/}}); 541 0x3C: save({{ 542 //CWP should be set directly so that it always happens 543 //Also, this will allow writing to the new window and 544 //reading from the old one 545 if(Cansave == 0) 546 { 547 if(Otherwin) | 473 { 474 int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 475 DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 476#if FULL_SYSTEM 477 fault = new TrapInstruction(lTrapNum); 478#else 479 DPRINTF(Sparc, "The syscall number is %d\n", R1); 480 xc->syscall(R1); --- 4 unchanged lines hidden (view full) --- 485 0x3B: Nop::flush({{/*Instruction memory flush*/}}); 486 0x3C: save({{ 487 //CWP should be set directly so that it always happens 488 //Also, this will allow writing to the new window and 489 //reading from the old one 490 if(Cansave == 0) 491 { 492 if(Otherwin) |
548 fault = new SpillNOther(WstateOther); | 493 fault = new SpillNOther(Wstate<5:3>); |
549 else | 494 else |
550 fault = new SpillNNormal(WstateNormal); | 495 fault = new SpillNNormal(Wstate<2:0>); |
551 Cwp = (Cwp + 2) % NWindows; 552 } 553 else if(Cleanwin - Canrestore == 0) 554 { 555 Cwp = (Cwp + 1) % NWindows; 556 fault = new CleanWindow; 557 } 558 else --- 11 unchanged lines hidden (view full) --- 570 0x3D: restore({{ 571 //CWP should be set directly so that it always happens 572 //Also, this will allow writing to the new window and 573 //reading from the old one 574 Cwp = (Cwp - 1 + NWindows) % NWindows; 575 if(Canrestore == 0) 576 { 577 if(Otherwin) | 496 Cwp = (Cwp + 2) % NWindows; 497 } 498 else if(Cleanwin - Canrestore == 0) 499 { 500 Cwp = (Cwp + 1) % NWindows; 501 fault = new CleanWindow; 502 } 503 else --- 11 unchanged lines hidden (view full) --- 515 0x3D: restore({{ 516 //CWP should be set directly so that it always happens 517 //Also, this will allow writing to the new window and 518 //reading from the old one 519 Cwp = (Cwp - 1 + NWindows) % NWindows; 520 if(Canrestore == 0) 521 { 522 if(Otherwin) |
578 fault = new FillNOther(WstateOther); | 523 fault = new FillNOther(Wstate<5:3>); |
579 else | 524 else |
580 fault = new FillNNormal(WstateNormal); | 525 fault = new FillNNormal(Wstate<2:0>); |
581 } 582 else 583 { 584 Rd = Rs1 + Rs2_or_imm13; 585 Cansave = Cansave + 1; 586 Canrestore = Canrestore - 1; 587 } 588 //This is here to make sure the CWP is written 589 //no matter what. This ensures that the results 590 //are written in the new window as well. 591 xc->setMiscRegWithEffect(MISCREG_CWP, Cwp); 592 }}); 593 0x3E: decode FCN { 594 0x0: Priv::done({{ 595 if(Tl == 0) 596 return new IllegalInstruction; | 526 } 527 else 528 { 529 Rd = Rs1 + Rs2_or_imm13; 530 Cansave = Cansave + 1; 531 Canrestore = Canrestore - 1; 532 } 533 //This is here to make sure the CWP is written 534 //no matter what. This ensures that the results 535 //are written in the new window as well. 536 xc->setMiscRegWithEffect(MISCREG_CWP, Cwp); 537 }}); 538 0x3E: decode FCN { 539 0x0: Priv::done({{ 540 if(Tl == 0) 541 return new IllegalInstruction; |
597 Cwp = xc->readMiscReg(MISCREG_TSTATE_CWP_BASE + Tl); 598 Asi = xc->readMiscReg(MISCREG_TSTATE_ASI_BASE + Tl); 599 Ccr = xc->readMiscReg(MISCREG_TSTATE_CCR_BASE + Tl); 600 Pstate = xc->readMiscReg(MISCREG_TSTATE_PSTATE_BASE + Tl); 601 NPC = xc->readMiscReg(MISCREG_TNPC_BASE + Tl); 602 NNPC = NPC + 4; | 542 543 Cwp = Tstate<4:0>; 544 Pstate = Tstate<20:8>; 545 Asi = Tstate<31:24>; 546 Ccr = Tstate<39:32>; 547 Gl = Tstate<42:40>; 548 NPC = Tnpc; 549 NNPC = Tnpc + 4; |
603 Tl = Tl - 1; 604 }}); 605 0x1: BasicOperate::retry({{ 606 if(Tl == 0) 607 return new IllegalInstruction; | 550 Tl = Tl - 1; 551 }}); 552 0x1: BasicOperate::retry({{ 553 if(Tl == 0) 554 return new IllegalInstruction; |
608 Cwp = xc->readMiscReg(MISCREG_TSTATE_CWP_BASE + Tl); 609 Asi = xc->readMiscReg(MISCREG_TSTATE_ASI_BASE + Tl); 610 Ccr = xc->readMiscReg(MISCREG_TSTATE_CCR_BASE + Tl); 611 Pstate = xc->readMiscReg(MISCREG_TSTATE_PSTATE_BASE + Tl); 612 NPC = xc->readMiscReg(MISCREG_TPC_BASE + Tl); 613 NNPC = xc->readMiscReg(MISCREG_TNPC_BASE + Tl); | 555 Cwp = Tstate<4:0>; 556 Pstate = Tstate<20:8>; 557 Asi = Tstate<31:24>; 558 Ccr = Tstate<39:32>; 559 Gl = Tstate<42:40>; 560 NPC = Tpc; 561 NNPC = Tnpc + 4; |
614 Tl = Tl - 1; 615 }}); 616 } 617 } 618 } 619 0x3: decode OP3 { 620 format Load { 621 0x00: lduw({{Rd = Mem;}}, {{32}}); --- 100 unchanged lines hidden --- | 562 Tl = Tl - 1; 563 }}); 564 } 565 } 566 } 567 0x3: decode OP3 { 568 format Load { 569 0x00: lduw({{Rd = Mem;}}, {{32}}); --- 100 unchanged lines hidden --- |