1063,1067c1063,1087
< 0x13: ldtwa({{
< uint64_t val = Mem.udw;
< RdLow = val<31:0>;
< RdHigh = val<63:32>;
< }}, {{EXT_ASI}});
---
> 0x13: decode EXT_ASI {
> //ASI_QUAD_LDD
> 0x24: TwinLoad::ldtx_quad_ldd(
> {{RdTwin.udw = Mem.udw}}, {{EXT_ASI}});
> //ASI_LDTX_REAL
> 0x26: TwinLoad::ldtx_real(
> {{RdTwin.udw = Mem.udw}}, {{EXT_ASI}});
> //ASI_LDTX_N
> 0x27: TwinLoad::ldtx_n(
> {{RdTwin.udw = Mem.udw}}, {{EXT_ASI}});
> //ASI_LDTX_L
> 0x2C: TwinLoad::ldtx_l(
> {{RdTwin.udw = Mem.udw}}, {{EXT_ASI}});
> //ASI_LDTX_REAL_L
> 0x2E: TwinLoad::ldtx_real_l(
> {{RdTwin.udw = Mem.udw}}, {{EXT_ASI}});
> //ASI_LDTX_N_L
> 0x2F: TwinLoad::ldtx_n_l(
> {{RdTwin.udw = Mem.udw}}, {{EXT_ASI}});
> default: ldtwa({{
> uint64_t val = Mem.udw;
> RdLow = val<31:0>;
> RdHigh = val<63:32>;
> }}, {{EXT_ASI}});
> }
1129,1140d1148
< //ASI_LDTX_REAL
< 0x26: TwinLoad::ldtx_real(
< {{RdTwin.udw = Mem.udw}}, {{EXT_ASI}});
< //ASI_LDTX_N
< 0x27: TwinLoad::ldtx_n(
< {{RdTwin.udw = Mem.udw}}, {{EXT_ASI}});
< //ASI_LDTX_REAL_L
< 0x2E: TwinLoad::ldtx_real_l(
< {{RdTwin.udw = Mem.udw}}, {{EXT_ASI}});
< //ASI_LDTX_N_L
< 0x2F: TwinLoad::ldtx_n_l(
< {{RdTwin.udw = Mem.udw}}, {{EXT_ASI}});