79,80d78
< {
< //warn("Took branch!\n");
82d79
< }
84,85d80
< {
< //warn("Didn't take branch!\n");
87d81
< }
256c250
< 0x1A: IntOpCcRes::umulcc({{
---
> 0x1A: umulcc({{
259,260c253,255
< Y = resTemp<63:32>;}});
< 0x1B: IntOpCcRes::smulcc({{
---
> Y = resTemp<63:32>;}},
> {{0}},{{0}},{{0}},{{0}});
> 0x1B: smulcc({{
263c258,259
< Y = resTemp<63:32>;}});
---
> Y = resTemp<63:32>;}},
> {{0}},{{0}},{{0}},{{0}});
273c269
< 0x1D: IntOpCcRes::udivxcc({{
---
> 0x1D: udivxcc({{
275c271,272
< else Rd = Rs1.udw / Rs2_or_imm13.udw;}});
---
> else Rd = Rs1.udw / Rs2_or_imm13.udw;}}
> ,{{0}},{{0}},{{0}},{{0}});
885a883,885
> //If both MemAddressNotAligned and
> //a fill trap happen, it's not clear
> //which one should be returned.
886a887,890
> if(target & 0x3)
> fault = new MemAddressNotAligned;
> else
> NNPC = target;
889,890d892
< //Check for fills which are higher priority than alignment
< //faults.
898,900d899
< //Check for alignment faults
< else if(target & 0x3)
< fault = new MemAddressNotAligned;
903c902,904
< NNPC = target;
---
> //CWP should be set directly so that it always happens
> //Also, this will allow writing to the new window and
> //reading from the old one
906a908,911
> //This is here to make sure the CWP is written
> //no matter what. This ensures that the results
> //are written in the new window as well.
> xc->setMiscRegWithEffect(MISCREG_CWP, Cwp);
924c929
< }}, IsSerializeAfter, IsNonSpeculative);
---
> }});
937c942
< }}, IsSerializeAfter, IsNonSpeculative);
---
> }});
940a946,948
> //CWP should be set directly so that it always happens
> //Also, this will allow writing to the new window and
> //reading from the old one
946a955
> //Cwp = (Cwp + 2) % NWindows;
949a959
> //Cwp = (Cwp + 1) % NWindows;
955c965
< Rd_next = Rs1 + Rs2_or_imm13;
---
> Rd = Rs1 + Rs2_or_imm13;
957a968,971
> //This is here to make sure the CWP is written
> //no matter what. This ensures that the results
> //are written in the new window as well.
> xc->setMiscRegWithEffect(MISCREG_CWP, Cwp);
969a984,986
> //CWP should be set directly so that it always happens
> //Also, this will allow writing to the new window and
> //reading from the old one
971c988
< Rd_prev = Rs1 + Rs2_or_imm13;
---
> Rd = Rs1 + Rs2_or_imm13;
973a991,994
> //This is here to make sure the CWP is written
> //no matter what. This ensures that the results
> //are written in the new window as well.
> xc->setMiscRegWithEffect(MISCREG_CWP, Cwp);
1036,1039c1057,1060
< format Load {
< 0x10: lduwa({{Rd = Mem.uw;}});
< 0x11: lduba({{Rd = Mem.ub;}});
< 0x12: lduha({{Rd = Mem.uhw;}});
---
> format LoadAlt {
> 0x10: lduwa({{Rd = Mem.uw;}}, {{EXT_ASI}});
> 0x11: lduba({{Rd = Mem.ub;}}, {{EXT_ASI}});
> 0x12: lduha({{Rd = Mem.uhw;}}, {{EXT_ASI}});
1044c1065
< }});
---
> }}, {{EXT_ASI}});
1046,1050c1067,1071
< format Store {
< 0x14: stwa({{Mem.uw = Rd;}});
< 0x15: stba({{Mem.ub = Rd;}});
< 0x16: stha({{Mem.uhw = Rd;}});
< 0x17: stda({{Mem.udw = RdLow<31:0> | RdHigh<31:0> << 32;}});
---
> format StoreAlt {
> 0x14: stwa({{Mem.uw = Rd;}}, {{EXT_ASI}});
> 0x15: stba({{Mem.ub = Rd;}}, {{EXT_ASI}});
> 0x16: stha({{Mem.uhw = Rd;}}, {{EXT_ASI}});
> 0x17: stda({{Mem.udw = RdLow<31:0> | RdHigh<31:0> << 32;}}, {{EXT_ASI}});
1052,1056c1073,1077
< format Load {
< 0x18: ldswa({{Rd = (int32_t)Mem.sw;}});
< 0x19: ldsba({{Rd = (int8_t)Mem.sb;}});
< 0x1A: ldsha({{Rd = (int16_t)Mem.shw;}});
< 0x1B: ldxa({{Rd = (int64_t)Mem.sdw;}});
---
> format LoadAlt {
> 0x18: ldswa({{Rd = (int32_t)Mem.sw;}}, {{EXT_ASI}});
> 0x19: ldsba({{Rd = (int8_t)Mem.sb;}}, {{EXT_ASI}});
> 0x1A: ldsha({{Rd = (int16_t)Mem.shw;}}, {{EXT_ASI}});
> 0x1B: ldxa({{Rd = (int64_t)Mem.sdw;}}, {{EXT_ASI}});
1058c1079
< 0x1D: LoadStore::ldstuba(
---
> 0x1D: LoadStoreAlt::ldstuba(
1060,1062c1081,1083
< {{Mem.ub = 0xFF}});
< 0x1E: Store::stxa({{Mem.udw = Rd}});
< 0x1F: LoadStore::swapa(
---
> {{Mem.ub = 0xFF}}, {{EXT_ASI}});
> 0x1E: StoreAlt::stxa({{Mem.udw = Rd}}, {{EXT_ASI}});
> 0x1F: LoadStoreAlt::swapa(
1065c1086
< {{Mem.uw = uReg0;}});
---
> {{Mem.uw = uReg0;}}, {{EXT_ASI}});
1082c1103
< 0x30: Load::ldfa({{Frd.uw = Mem.uw;}});
---
> 0x30: LoadAlt::ldfa({{Frd.uw = Mem.uw;}}, {{EXT_ASI}});
1134c1155
< 0xF0: ldblockf_p({{Frd_N.udw = Mem.udw;}});
---
> 0xF0: ldblockf_p({{Frd_N.udw = Mem.udw;}}, {{EXT_ASI}});
1217c1238
< 0xF0: stblockf_p({{Mem.udw = Frd_N.udw;}});
---
> 0xF0: stblockf_p({{Mem.udw = Frd_N.udw;}}, {{EXT_ASI}});
1254c1275
< Rd.uw = uReg0;}});
---
> Rd.uw = uReg0;}}, {{EXT_ASI}});
1262c1283
< Rd = uReg0;}});
---
> Rd = uReg0;}}, {{EXT_ASI}});