43a44
> //bpcc
49c50
< 0x0: b(19, {{
---
> 0x0: bpa(19, {{
52c53
< 0x1: b(19, {{
---
> 0x1: bpa(19, {{
60c61
< 0x0: bn(19, {{
---
> 0x0: bpn(19, {{
63c64
< 0x1: bn(19, {{
---
> 0x1: bpn(19, {{
84,89c85,116
< 0x2: bicc(22, {{
< if(passesCondition(Ccr<3:0>, COND2))
< NNPC = xc->readPC() + disp;
< else
< handle_annul
< }});
---
> //bicc
> 0x2: decode COND2
> {
> //Branch Always
> 0x8: decode A
> {
> 0x0: ba(22, {{
> NNPC = xc->readPC() + disp;
> }});
> 0x1: ba(22, {{
> NPC = xc->readPC() + disp;
> NNPC = NPC + 4;
> }}, ',a');
> }
> //Branch Never
> 0x0: decode A
> {
> 0x0: bn(22, {{
> NNPC = NNPC;//Don't do anything
> }});
> 0x1: bn(22, {{
> NPC = xc->readNextPC() + 4;
> NNPC = NPC + 4;
> }}, ',a');
> }
> default: bicc(22, {{
> if(passesCondition(Ccr<3:0>, COND2))
> NNPC = xc->readPC() + disp;
> else
> handle_annul
> }});
> }
383c410,418
< //0x1A-0x1F should cause an illegal instruction exception
---
> 0x1A: Priv::rdstrand_sts_reg({{
> if(Pstate<2:> && !Hpstate<2:>)
> Rd = StrandStsReg<0:>;
> else
> Rd = StrandStsReg;
> }});
> //0x1A is supposed to be reserved, but it reads the strand
> //status register.
> //0x1B-0x1F should cause an illegal instruction exception
518c553,562
< //0x1A-0x1F should cause an illegal instruction exception
---
> 0x1A: Priv::wrstrand_sts_reg({{
> if(Pstate<2:> && !Hpstate<2:>)
> StrandStsReg = StrandStsReg<63:1> |
> (Rs1 ^ Rs2_or_imm13)<0:>;
> else
> StrandStsReg = Rs1 ^ Rs2_or_imm13;
> }});
> //0x1A is supposed to be reserved, but it writes the strand
> //status register.
> //0x1B-0x1F should cause an illegal instruction exception
530c574
< 0x1: BasicOperate::restored({{
---
> 0x1: Priv::restored({{