1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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129 0x0A: umul({{
130 Rd = Rs1.udw<31:0> * Rs2_or_imm13<31:0>;
131 Y = Rd<63:32>;
132 }});
133 0x0B: smul({{
134 Rd.sdw = Rs1.sdw<31:0> * Rs2_or_imm13<31:0>;
135 Y = Rd.sdw;
136 }});
137 0x0C: subc({{Rd.sdw = Rs1.sdw + (~Rs2_or_imm13) + 1 + Ccr<0:0>}});
138 0x0D: udivx({{
139 if(Rs2_or_imm13 == 0) fault = new DivisionByZero;
140 else Rd.udw = Rs1.udw / Rs2_or_imm13;
141 }});
142 0x0E: udiv({{
143 if(Rs2_or_imm13 == 0) fault = new DivisionByZero;
144 else
145 {

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203 0x1B: smulcc({{
204 int64_t resTemp;
205 Rd = resTemp = Rs1.sdw<31:0> * Rs2_or_imm13.sdw<31:0>;
206 Y = resTemp<63:32>;}},
207 {{0}},{{0}},{{0}},{{0}});
208 0x1C: subccc({{
209 int64_t resTemp, val2 = Rs2_or_imm13;
210 int64_t carryin = Ccr<0:0>;
211 Rd = resTemp = Rs1 + ~(val2 + carryin) + 1;}},
212 {{(~((Rs1<31:0> + (~(val2 + carryin))<31:0> + 1))<32:>)}},
213 {{Rs1<31:> != val2<31:> && Rs1<31:> != resTemp<31:>}},
214 {{(~((Rs1<63:1> + (~(val2 + carryin))<63:1>) + (Rs1<0:> + (~(val2+carryin))<0:> + 1)<63:1>))<63:>}},
215 {{Rs1<63:> != val2<63:> && Rs1<63:> != resTemp<63:>}}
216 );
217 0x1D: udivxcc({{
218 if(Rs2_or_imm13.udw == 0) fault = new DivisionByZero;
219 else Rd = Rs1.udw / Rs2_or_imm13.udw;}}

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267 int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);}},
268 {{(Rs1 & 0xFFFFFFFF + val2 & 0xFFFFFFFF) >> 31}},
269 {{overflow}},
270 {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}},
271 {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
272 );
273 0x22: taddcctv({{
274 int64_t resTemp, val2 = Rs2_or_imm13;
275 Rd = resTemp = Rs1 + val2;
276 int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);
277 if(overflow) fault = new TagOverflow;}},
278 {{((Rs1 & 0xFFFFFFFF + val2 & 0xFFFFFFFF) >> 31)}},
279 {{overflow}},
280 {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}},
281 {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}}
282 );
283 0x23: tsubcctv({{
284 int64_t resTemp, val2 = Rs2_or_imm13;

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317 0x0: srl({{Rd = Rs1.uw >> (I ? SHCNT32 : Rs2<4:0>);}});
318 0x1: srlx({{Rd = Rs1.udw >> (I ? SHCNT64 : Rs2<5:0>);}});
319 }
320 0x27: decode X {
321 0x0: sra({{Rd = Rs1.sw >> (I ? SHCNT32 : Rs2<4:0>);}});
322 0x1: srax({{Rd = Rs1.sdw >> (I ? SHCNT64 : Rs2<5:0>);}});
323 }
324 // XXX might want a format rdipr thing here
325 0x28: rdasr({{
326 Rd = xc->readMiscRegWithEffect(RS1 + AsrStart, fault);
327 }});
328 0x29: HPriv::rdhpr({{
329 // XXX Need to protect with format that traps non-priv/priv
330 // access
331 Rd = xc->readMiscRegWithEffect(RS1 + HprStart, fault);
332 }});
333 0x2A: Priv::rdpr({{
334 // XXX Need to protect with format that traps non-priv
335 // access

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402 // access
403 fault = xc->setMiscRegWithEffect(RD + PrStart, Rs1 ^ Rs2_or_imm13);
404 }});
405 0x33: HPriv::wrhpr({{
406 // XXX Need to protect with format that traps non-priv/priv
407 // access
408 fault = xc->setMiscRegWithEffect(RD + HprStart, Rs1 ^ Rs2_or_imm13);
409 }});
410 0x34: Trap::fpop1({{fault = new FpDisabled;}});
411 0x35: Trap::fpop2({{fault = new FpDisabled;}});
412 0x38: Branch::jmpl({{
413 Addr target = Rs1 + Rs2_or_imm13;
414 if(target & 0x3)
415 fault = new MemAddressNotAligned;
416 else
417 {
418 Rd = xc->readPC();
419 NNPC = target;

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640 0x24: stf({{fault = new FpDisabled;}});
641 0x25: decode X {
642 0x0: Store::stfsr({{Mem = Fsr<31:0>;}}, {{32}});
643 0x1: Store::stxfsr({{Mem = Fsr;}}, {{64}});
644 }
645 0x26: stqf({{fault = new FpDisabled;}});
646 0x27: stdf({{fault = new FpDisabled;}});
647 0x2D: Nop::prefetch({{ }});
648 0x30: ldfa({{return new FpDisabled;}});
649 0x32: ldqfa({{fault = new FpDisabled;}});
650 0x33: lddfa({{fault = new FpDisabled;}});
651 0x34: stfa({{fault = new FpDisabled;}});
652 0x35: stqfa({{fault = new FpDisabled;}});
653 0x36: stdfa({{fault = new FpDisabled;}});
654 0x3C: Cas::casa({{
655 uint64_t val = Mem.uw;
656 if(Rs2.uw == val)
657 Mem.uw = Rd.uw;
658 Rd.uw = val;
659 }});
660 0x3D: Nop::prefetcha({{ }});
661 0x3E: Cas::casxa({{
662 uint64_t val = Mem.udw;
663 if(Rs2 == val)
664 Mem.udw = Rd;
665 Rd = val;
666 }});
667 }
668 }
669}