base.isa (2951:b9c5f8ad38c2) | base.isa (3278:986122553077) |
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1// Copyright (c) 2006 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 63 unchanged lines hidden (view full) --- 72 /** 73 * Base class for all SPARC static instructions. 74 */ 75 class SparcStaticInst : public StaticInst 76 { 77 protected: 78 // Constructor. 79 SparcStaticInst(const char *mnem, | 1// Copyright (c) 2006 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 63 unchanged lines hidden (view full) --- 72 /** 73 * Base class for all SPARC static instructions. 74 */ 75 class SparcStaticInst : public StaticInst 76 { 77 protected: 78 // Constructor. 79 SparcStaticInst(const char *mnem, |
80 MachInst _machInst, OpClass __opClass) | 80 ExtMachInst _machInst, OpClass __opClass) |
81 : StaticInst(mnem, _machInst, __opClass) 82 { 83 } 84 85 std::string generateDisassembly(Addr pc, 86 const SymbolTable *symtab) const; 87 88 void printReg(std::ostream &os, int reg) const; --- 196 unchanged lines hidden --- | 81 : StaticInst(mnem, _machInst, __opClass) 82 { 83 } 84 85 std::string generateDisassembly(Addr pc, 86 const SymbolTable *symtab) const; 87 88 void printReg(std::ostream &os, int reg) const; --- 196 unchanged lines hidden --- |