interrupts.hh (5704:98224505352a) interrupts.hh (5810:606de5b3d116)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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38#include "params/SparcInterrupts.hh"
39#include "sim/sim_object.hh"
40
41namespace SparcISA
42{
43
44class Interrupts : public SimObject
45{
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 29 unchanged lines hidden (view full) ---

38#include "params/SparcInterrupts.hh"
39#include "sim/sim_object.hh"
40
41namespace SparcISA
42{
43
44class Interrupts : public SimObject
45{
46
47 private:
46 private:
47 BaseCPU * cpu;
48
48 uint64_t interrupts[NumInterruptTypes];
49 uint64_t intStatus;
50
51 public:
49 uint64_t interrupts[NumInterruptTypes];
50 uint64_t intStatus;
51
52 public:
53
54 void
55 setCPU(BaseCPU * _cpu)
56 {
57 cpu = _cpu;
58 }
59
52 typedef SparcInterruptsParams Params;
53
54 const Params *
55 params() const
56 {
57 return dynamic_cast<const Params *>(_params);
58 }
59
60 typedef SparcInterruptsParams Params;
61
62 const Params *
63 params() const
64 {
65 return dynamic_cast<const Params *>(_params);
66 }
67
60 Interrupts(Params * p) : SimObject(p)
68 Interrupts(Params * p) : SimObject(p), cpu(NULL)
61 {
62 clearAll();
63 }
64
65 int
66 InterruptLevel(uint64_t softint)
67 {
68 if (softint & 0x10000 || softint & 0x1)

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69 {
70 clearAll();
71 }
72
73 int
74 InterruptLevel(uint64_t softint)
75 {
76 if (softint & 0x10000 || softint & 0x1)

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