1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 94 unchanged lines hidden (view full) --- 103 // THESE ARE IN ORDER OF PRIORITY 104 // since there are early returns, and the highest 105 // priority interrupts should get serviced, 106 // it is v. important that new interrupts are inserted 107 // in the right order of processing 108 if (hpstate & HPSTATE::hpriv) { 109 if (ie) { 110 if (interrupts[hstick_match]) { |
111 if (tc->readMiscReg(MISCREG_HINTP) & 1) { 112 interrupts[hstick_match] = false; 113 --numPosted; 114 return new HstickMatch; 115 } |
116 } 117 if (interrupts[interrupt_vector]) { 118 interrupts[interrupt_vector] = false; 119 --numPosted; 120 //HAVEN'T IMPLed THIS YET 121 return NoFault; 122 } |
123 } else { 124 if (interrupts[hstick_match]) { 125 return NoFault; 126 } 127 |
128 } 129 } else { |
130 if (interrupts[trap_level_zero]) { 131 if ((pstate & HPSTATE::tlz) && (tc->readMiscReg(MISCREG_TL) == 0)) { 132 interrupts[trap_level_zero] = false; 133 --numPosted; 134 return new TrapLevelZero; 135 } 136 } 137 if (interrupts[hstick_match]) { |
138 if (tc->readMiscReg(MISCREG_HINTP) & 1) { 139 interrupts[hstick_match] = false; 140 --numPosted; 141 return new HstickMatch; 142 } |
143 } 144 if (ie) { 145 if (interrupts[cpu_mondo]) { 146 interrupts[cpu_mondo] = false; 147 --numPosted; 148 return new CpuMondo; 149 } 150 if (interrupts[dev_mondo]) { --- 56 unchanged lines hidden --- |