1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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40
41namespace SparcISA
42{
43
44class Interrupts : public SimObject
45{
46
47 private:
48
49 uint64_t interrupts[NumInterruptTypes];
50 uint64_t intStatus;
51
52 public:
53 typedef SparcInterruptsParams Params;
54
55 const Params *
56 params() const
57 {
58 return dynamic_cast<const Params *>(_params);
59 }
60
61 Interrupts(Params * p) : SimObject(p)
62 {
63 clear_all();
64 }
65
66 int InterruptLevel(uint64_t softint)
67 {
68 if (softint & 0x10000 || softint & 0x1)
69 return 14;
70
71 int level = 15;
72 while (level > 0 && !(1 << level & softint))
73 level--;
74 if (1 << level & softint)
75 return level;
76 return 0;
77 }
78
79 void post(int int_num, int index)
80 {
81 DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
82 assert(int_num >= 0 && int_num < NumInterruptTypes);
83 assert(index >= 0 && index < 64);
84
85 interrupts[int_num] |= ULL(1) << index;
86 intStatus |= ULL(1) << int_num;
87 }
88
89 void clear(int int_num, int index)
90 {
91 DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
92 assert(int_num >= 0 && int_num < NumInterruptTypes);
93 assert(index >= 0 && index < 64);
94
95 interrupts[int_num] &= ~(ULL(1) << index);
96 if (!interrupts[int_num])
97 intStatus &= ~(ULL(1) << int_num);
98 }
99
100 void clear_all()
101 {
102 for (int i = 0; i < NumInterruptTypes; ++i) {
103 interrupts[i] = 0;
104 }
105 intStatus = 0;
106 }
107
108 bool check_interrupts(ThreadContext * tc) const
109 {
110 return intStatus;
111 }
112
113 Fault getInterrupt(ThreadContext * tc)
114 {
115 int hpstate = tc->readMiscRegNoEffect(MISCREG_HPSTATE);
116 int pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE);
117 bool ie = pstate & PSTATE::ie;
118
119 // THESE ARE IN ORDER OF PRIORITY
120 // since there are early returns, and the highest
121 // priority interrupts should get serviced,

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148 if (ie) {
149 if (interrupts[IT_CPU_MONDO]) {
150 return new CpuMondo;
151 }
152 if (interrupts[IT_DEV_MONDO]) {
153 return new DevMondo;
154 }
155 if (interrupts[IT_SOFT_INT]) {
156 return new
157 InterruptLevelN(InterruptLevel(interrupts[IT_SOFT_INT]));
158 }
159
160 if (interrupts[IT_RES_ERROR]) {
161 return new ResumableError;
162 }
163 } // !hpriv && ie
164 } // !hpriv
165 return NoFault;
166 }
167
168 void updateIntrInfo(ThreadContext * tc)
169 {
170
171 }
172
173 uint64_t get_vec(int int_num)
174 {
175 assert(int_num >= 0 && int_num < NumInterruptTypes);
176 return interrupts[int_num];
177 }
178
179 void serialize(std::ostream &os)
180 {
181 SERIALIZE_ARRAY(interrupts,NumInterruptTypes);
182 SERIALIZE_SCALAR(intStatus);
183 }
184
185 void unserialize(Checkpoint *cp, const std::string &section)
186 {
187 UNSERIALIZE_ARRAY(interrupts,NumInterruptTypes);
188 UNSERIALIZE_SCALAR(intStatus);
189 }
190};
191} // namespace SPARC_ISA
192
193#endif // __ARCH_SPARC_INTERRUPT_HH__