1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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40
41namespace SparcISA
42{
43
44class Interrupts : public SimObject
45{
46
47 private:
48 uint64_t interrupts[NumInterruptTypes];
49 uint64_t intStatus;
50
51 public:
52 typedef SparcInterruptsParams Params;
53
54 const Params *
55 params() const
56 {
57 return dynamic_cast<const Params *>(_params);
58 }
59
60 Interrupts(Params * p) : SimObject(p)
61 {
62 clearAll();
63 }
64
65 int
66 InterruptLevel(uint64_t softint)
67 {
68 if (softint & 0x10000 || softint & 0x1)
69 return 14;
70
71 int level = 15;
72 while (level > 0 && !(1 << level & softint))
73 level--;
74 if (1 << level & softint)
75 return level;
76 return 0;
77 }
78
79 void
80 post(int int_num, int index)
81 {
82 DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
83 assert(int_num >= 0 && int_num < NumInterruptTypes);
84 assert(index >= 0 && index < 64);
85
86 interrupts[int_num] |= ULL(1) << index;
87 intStatus |= ULL(1) << int_num;
88 }
89
90 void
91 clear(int int_num, int index)
92 {
93 DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
94 assert(int_num >= 0 && int_num < NumInterruptTypes);
95 assert(index >= 0 && index < 64);
96
97 interrupts[int_num] &= ~(ULL(1) << index);
98 if (!interrupts[int_num])
99 intStatus &= ~(ULL(1) << int_num);
100 }
101
102 void
103 clearAll()
104 {
105 for (int i = 0; i < NumInterruptTypes; ++i) {
106 interrupts[i] = 0;
107 }
108 intStatus = 0;
109 }
110
111 bool
112 checkInterrupts(ThreadContext *tc) const
113 {
114 return intStatus;
115 }
116
117 Fault
118 getInterrupt(ThreadContext *tc)
119 {
120 int hpstate = tc->readMiscRegNoEffect(MISCREG_HPSTATE);
121 int pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE);
122 bool ie = pstate & PSTATE::ie;
123
124 // THESE ARE IN ORDER OF PRIORITY
125 // since there are early returns, and the highest
126 // priority interrupts should get serviced,

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153 if (ie) {
154 if (interrupts[IT_CPU_MONDO]) {
155 return new CpuMondo;
156 }
157 if (interrupts[IT_DEV_MONDO]) {
158 return new DevMondo;
159 }
160 if (interrupts[IT_SOFT_INT]) {
161 int level = InterruptLevel(interrupts[IT_SOFT_INT]);
162 return new InterruptLevelN(level);
163 }
164
165 if (interrupts[IT_RES_ERROR]) {
166 return new ResumableError;
167 }
168 } // !hpriv && ie
169 } // !hpriv
170 return NoFault;
171 }
172
173 void
174 updateIntrInfo(ThreadContext *tc)
175 {
176
177 }
178
179 uint64_t
180 get_vec(int int_num)
181 {
182 assert(int_num >= 0 && int_num < NumInterruptTypes);
183 return interrupts[int_num];
184 }
185
186 void
187 serialize(std::ostream &os)
188 {
189 SERIALIZE_ARRAY(interrupts,NumInterruptTypes);
190 SERIALIZE_SCALAR(intStatus);
191 }
192
193 void
194 unserialize(Checkpoint *cp, const std::string &section)
195 {
196 UNSERIALIZE_ARRAY(interrupts,NumInterruptTypes);
197 UNSERIALIZE_SCALAR(intStatus);
198 }
199};
200} // namespace SPARC_ISA
201
202#endif // __ARCH_SPARC_INTERRUPT_HH__