priv.hh (12287:4163eeb6210c) priv.hh (12616:4b463b4dc098)
1/*
2 * Copyright (c) 2006-2007 The Regents of The University of Michigan
3 * All rights reserved
4 * Copyright 2017 Google Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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41
42/**
43 * Base class for privelege mode operations.
44 */
45class Priv : public SparcStaticInst
46{
47 protected:
48 using SparcStaticInst::SparcStaticInst;
1/*
2 * Copyright (c) 2006-2007 The Regents of The University of Michigan
3 * All rights reserved
4 * Copyright 2017 Google Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 32 unchanged lines hidden (view full) ---

41
42/**
43 * Base class for privelege mode operations.
44 */
45class Priv : public SparcStaticInst
46{
47 protected:
48 using SparcStaticInst::SparcStaticInst;
49 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
49 std::string generateDisassembly(
50 Addr pc, const SymbolTable *symtab) const override;
50};
51
52class PrivReg : public Priv
53{
54 protected:
55 PrivReg(const char *mnem, ExtMachInst _machInst,
56 OpClass __opClass, char const * _regName) :
57 Priv(mnem, _machInst, __opClass), regName(_regName)
58 {}
59
60 char const *regName;
61};
62
63// This class is for instructions that explicitly read control
64// registers. It provides a special generateDisassembly function.
65class RdPriv : public PrivReg
66{
67 protected:
68 using PrivReg::PrivReg;
51};
52
53class PrivReg : public Priv
54{
55 protected:
56 PrivReg(const char *mnem, ExtMachInst _machInst,
57 OpClass __opClass, char const * _regName) :
58 Priv(mnem, _machInst, __opClass), regName(_regName)
59 {}
60
61 char const *regName;
62};
63
64// This class is for instructions that explicitly read control
65// registers. It provides a special generateDisassembly function.
66class RdPriv : public PrivReg
67{
68 protected:
69 using PrivReg::PrivReg;
69 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
70 std::string generateDisassembly(
71 Addr pc, const SymbolTable *symtab) const override;
70};
71
72// This class is for instructions that explicitly write control
73// registers. It provides a special generateDisassembly function.
74class WrPriv : public PrivReg
75{
76 protected:
77 using PrivReg::PrivReg;
72};
73
74// This class is for instructions that explicitly write control
75// registers. It provides a special generateDisassembly function.
76class WrPriv : public PrivReg
77{
78 protected:
79 using PrivReg::PrivReg;
78 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
80 std::string generateDisassembly(
81 Addr pc, const SymbolTable *symtab) const override;
79};
80
81/**
82 * Base class for privelege mode operations with immediates.
83 */
84class PrivImm : public Priv
85{
86 protected:

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98{
99 protected:
100 // Constructor
101 WrPrivImm(const char *mnem, ExtMachInst _machInst,
102 OpClass __opClass, char const *_regName) :
103 PrivImm(mnem, _machInst, __opClass), regName(_regName)
104 {}
105
82};
83
84/**
85 * Base class for privelege mode operations with immediates.
86 */
87class PrivImm : public Priv
88{
89 protected:

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101{
102 protected:
103 // Constructor
104 WrPrivImm(const char *mnem, ExtMachInst _machInst,
105 OpClass __opClass, char const *_regName) :
106 PrivImm(mnem, _machInst, __opClass), regName(_regName)
107 {}
108
106 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
109 std::string generateDisassembly(
110 Addr pc, const SymbolTable *symtab) const override;
107
108 char const *regName;
111
112 char const *regName;
113};
114
109}
115}
110;
111}
112
113#endif //__ARCH_SPARC_INSTS_PRIV_HH__
116
117#endif //__ARCH_SPARC_INSTS_PRIV_HH__