faults.cc (3893:e2a358430839) faults.cc (3926:c57925da8d38)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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335 tc->setMiscReg(MISCREG_HTSTATE, HPSTATE);
336
337 //TT = trap type;
338 tc->setMiscReg(MISCREG_TT, tt);
339
340 //Update GL
341 tc->setMiscRegWithEffect(MISCREG_GL, min<int>(GL+1, MaxGL));
342
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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335 tc->setMiscReg(MISCREG_HTSTATE, HPSTATE);
336
337 //TT = trap type;
338 tc->setMiscReg(MISCREG_TT, tt);
339
340 //Update GL
341 tc->setMiscRegWithEffect(MISCREG_GL, min<int>(GL+1, MaxGL));
342
343 //set PSTATE.mm to 00
344 //set PSTATE.pef to 1
345 PSTATE |= (1 << 4);
346 //set PSTATE.am to 0
347 PSTATE &= ~(1 << 3);
348/* //set PSTATE.priv to 0
349 PSTATE &= ~(1 << 2);*/
350 //set PSTATE.ie to 0
351 //PSTATE.priv is set to 1 here. The manual says it should be 0, but
352 //Legion sets it to 1.
353 PSTATE |= (1 << 2);
354 //set PSTATE.cle to 0
355 PSTATE &= ~(1 << 9);
356 //PSTATE.tle is unchanged
357 //XXX Where is the tct bit?
358 //set PSTATE.tct to 0
343 PSTATE = mbits(PSTATE, 2, 2); // just save the priv bit
344 PSTATE |= (1 << 4); //set PSTATE.pef to 1
359 tc->setMiscReg(MISCREG_PSTATE, PSTATE);
360
361 //set HPSTATE.red to 1
362 HPSTATE |= (1 << 5);
363 //set HPSTATE.hpriv to 1
364 HPSTATE |= (1 << 2);
365 //set HPSTATE.ibe to 0
366 HPSTATE &= ~(1 << 10);

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437
438 //Update the global register level
439 if (!gotoHpriv)
440 tc->setMiscRegWithEffect(MISCREG_GL, min<int>(GL+1, MaxPGL));
441 else
442 tc->setMiscRegWithEffect(MISCREG_GL, min<int>(GL+1, MaxGL));
443
444 //PSTATE.mm is unchanged
345 tc->setMiscReg(MISCREG_PSTATE, PSTATE);
346
347 //set HPSTATE.red to 1
348 HPSTATE |= (1 << 5);
349 //set HPSTATE.hpriv to 1
350 HPSTATE |= (1 << 2);
351 //set HPSTATE.ibe to 0
352 HPSTATE &= ~(1 << 10);

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423
424 //Update the global register level
425 if (!gotoHpriv)
426 tc->setMiscRegWithEffect(MISCREG_GL, min<int>(GL+1, MaxPGL));
427 else
428 tc->setMiscRegWithEffect(MISCREG_GL, min<int>(GL+1, MaxGL));
429
430 //PSTATE.mm is unchanged
445 //PSTATE.pef = whether or not an fpu is present
446 //XXX We'll say there's one present, even though there aren't
447 //implementations for a decent number of the instructions
448 PSTATE |= (1 << 4);
449 //PSTATE.am = 0
450 PSTATE &= ~(1 << 3);
451 if (!gotoHpriv)
452 {
453 //PSTATE.priv = 1
454 PSTATE |= (1 << 2);
455 //PSTATE.cle = PSTATE.tle
456 replaceBits(PSTATE, 9, 9, PSTATE >> 8);
457 }
458 else
459 {
460 //PSTATE.priv = 0
461 //PSTATE.priv is set to 1 here. The manual says it should be 0, but
462 //Legion sets it to 1.
463 PSTATE |= (1 << 2);
464 //PSTATE.cle = 0
465 PSTATE &= ~(1 << 9);
466 }
467 //PSTATE.ie = 0
468 PSTATE &= ~(1 << 1);
431 PSTATE |= (1 << 4); //PSTATE.pef = whether or not an fpu is present
432 PSTATE &= ~(1 << 3); //PSTATE.am = 0
433 PSTATE &= ~(1 << 1); //PSTATE.ie = 0
469 //PSTATE.tle is unchanged
470 //PSTATE.tct = 0
434 //PSTATE.tle is unchanged
435 //PSTATE.tct = 0
471 //XXX Where exactly is this field?
472 tc->setMiscReg(MISCREG_PSTATE, PSTATE);
473
474 if (gotoHpriv)
475 {
436
437 if (gotoHpriv)
438 {
476 //HPSTATE.red = 0
477 HPSTATE &= ~(1 << 5);
478 //HPSTATE.hpriv = 1
479 HPSTATE |= (1 << 2);
480 //HPSTATE.ibe = 0
481 HPSTATE &= ~(1 << 10);
439 PSTATE &= ~(1 << 9); // PSTATE.cle = 0
440 //The manual says PSTATE.priv should be 0, but Legion leaves it alone
441 HPSTATE &= ~(1 << 5); //HPSTATE.red = 0
442 HPSTATE |= (1 << 2); //HPSTATE.hpriv = 1
443 HPSTATE &= ~(1 << 10); //HPSTATE.ibe = 0
482 //HPSTATE.tlz is unchanged
483 tc->setMiscReg(MISCREG_HPSTATE, HPSTATE);
444 //HPSTATE.tlz is unchanged
445 tc->setMiscReg(MISCREG_HPSTATE, HPSTATE);
446 } else { // we are going to priv
447 PSTATE |= (1 << 2); //PSTATE.priv = 1
448 replaceBits(PSTATE, 9, 9, PSTATE >> 8); //PSTATE.cle = PSTATE.tle
484 }
449 }
450 tc->setMiscReg(MISCREG_PSTATE, PSTATE);
485
451
452
486 bool changedCWP = true;
487 if (tt == 0x24)
488 CWP++;
489 else if (0x80 <= tt && tt <= 0xbf)
490 CWP += (CANSAVE + 2);
491 else if (0xc0 <= tt && tt <= 0xff)
492 CWP--;
493 else

--- 208 unchanged lines hidden --- 		453 bool changedCWP = true;
454 if (tt == 0x24)
455 CWP++;
456 else if (0x80 <= tt && tt <= 0xbf)
457 CWP += (CANSAVE + 2);
458 else if (0xc0 <= tt && tt <= 0xff)
459 CWP--;
460 else

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