1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 27 unchanged lines hidden (view full) --- 36#include "arch/sparc/types.hh" 37#include "base/bitfield.hh" 38#include "base/trace.hh" 39#include "sim/full_system.hh" 40#include "cpu/base.hh" 41#include "cpu/thread_context.hh" 42#if !FULL_SYSTEM 43#include "arch/sparc/process.hh" |
44#endif |
45#include "mem/page_table.hh" 46#include "sim/process.hh" |
47#include "sim/full_system.hh" 48 49using namespace std; 50 51namespace SparcISA 52{ 53 54template<> SparcFaultBase::FaultVals --- 564 unchanged lines hidden (view full) --- 619 hstick_cmprFields.int_dis = 1; // disable timer compare interrupts 620 hstick_cmprFields.tick_cmpr = 0; // Reset to 0 for pretty printing 621 */ 622} 623 624void 625FastInstructionAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst) 626{ |
627 if (FullSystem) { 628 SparcFaultBase::invoke(tc, inst); |
629 } else { |
630 Process *p = tc->getProcessPtr(); 631 TlbEntry entry; 632 bool success = p->pTable->lookup(vaddr, entry); 633 if (!success) { 634 panic("Tried to execute unmapped address %#x.\n", vaddr); 635 } else { 636 Addr alignedVaddr = p->pTable->pageAlign(vaddr); 637 tc->getITBPtr()->insert(alignedVaddr, 0 /*partition id*/, 638 p->M5_pid /*context id*/, false, entry.pte); 639 } |
640 } |
641} 642 643void 644FastDataAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst) 645{ |
646 if (FullSystem) { 647 SparcFaultBase::invoke(tc, inst); |
648 } else { |
649 Process *p = tc->getProcessPtr(); 650 TlbEntry entry; 651 bool success = p->pTable->lookup(vaddr, entry); 652 if (!success) { 653 if (p->fixupStackFault(vaddr)) 654 success = p->pTable->lookup(vaddr, entry); 655 } 656 if (!success) { 657 panic("Tried to access unmapped address %#x.\n", vaddr); 658 } else { 659 Addr alignedVaddr = p->pTable->pageAlign(vaddr); 660 tc->getDTBPtr()->insert(alignedVaddr, 0 /*partition id*/, 661 p->M5_pid /*context id*/, false, entry.pte); 662 } |
663 } |
664} 665 666void 667SpillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst) 668{ 669#if !FULL_SYSTEM 670 doNormalFault(tc, trapType(), false); 671 --- 59 unchanged lines hidden --- |