33c33
< #include "cpu/exec_context.hh"
---
> #include "cpu/thread_context.hh"
223c223
< void SparcFault::invoke(ExecContext * xc)
---
> void SparcFault::invoke(ThreadContext * tc)
225c225
< FaultBase::invoke(xc);
---
> FaultBase::invoke(tc);
230,231c230,231
< if (setRestartAddress() || !xc->inPalMode())
< xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, xc->regs.pc);
---
> if (setRestartAddress() || !tc->inPalMode())
> tc->setMiscReg(AlphaISA::IPR_EXC_ADDR, tc->regs.pc);
235,236c235,236
< xc->setMiscReg(AlphaISA::IPR_EXC_ADDR,
< xc->readMiscReg(AlphaISA::IPR_EXC_ADDR) + 4);
---
> tc->setMiscReg(AlphaISA::IPR_EXC_ADDR,
> tc->readMiscReg(AlphaISA::IPR_EXC_ADDR) + 4);
239,240c239,240
< if (!xc->inPalMode())
< AlphaISA::swap_palshadow(&(xc->regs), true);
---
> if (!tc->inPalMode())
> AlphaISA::swap_palshadow(&(tc->regs), true);
242,243c242,243
< xc->regs.pc = xc->readMiscReg(AlphaISA::IPR_PAL_BASE) + vect();
< xc->regs.npc = xc->regs.pc + sizeof(MachInst);*/
---
> tc->regs.pc = tc->readMiscReg(AlphaISA::IPR_PAL_BASE) + vect();
> tc->regs.npc = tc->regs.pc + sizeof(MachInst);*/
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< void TrapInstruction::invoke(ExecContext * xc)
---
> void TrapInstruction::invoke(ThreadContext * tc)
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< xc->syscall(syscall_num);
---
> tc->syscall(syscall_num);