1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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619 */
620}
621
622void
623FastInstructionAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst)
624{
625 if (FullSystem) {
626 SparcFaultBase::invoke(tc, inst);
627 } else {
628 Process *p = tc->getProcessPtr();
629 TlbEntry entry;
630 bool success = p->pTable->lookup(vaddr, entry);
631 if (!success) {
632 panic("Tried to execute unmapped address %#x.\n", vaddr);
633 } else {
634 Addr alignedVaddr = p->pTable->pageAlign(vaddr);
635 tc->getITBPtr()->insert(alignedVaddr, 0 /*partition id*/,
636 p->M5_pid /*context id*/, false, entry.pte);
637 }
638 }
639}
640
641void
642FastDataAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst)
643{
644 if (FullSystem) {
645 SparcFaultBase::invoke(tc, inst);
646 } else {
647 Process *p = tc->getProcessPtr();
648 TlbEntry entry;
649 bool success = p->pTable->lookup(vaddr, entry);
650 if (!success) {
651 if (p->fixupStackFault(vaddr))
652 success = p->pTable->lookup(vaddr, entry);
653 }
654 if (!success) {
655 panic("Tried to access unmapped address %#x.\n", vaddr);
656 } else {
657 Addr alignedVaddr = p->pTable->pageAlign(vaddr);
658 tc->getDTBPtr()->insert(alignedVaddr, 0 /*partition id*/,
659 p->M5_pid /*context id*/, false, entry.pte);
660 }
661 }
662}
663
664void
665SpillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst)
666{
667 if (FullSystem) {
668 SparcFaultBase::invoke(tc, inst);
669 } else {
670 doNormalFault(tc, trapType(), false);
671
672 Process *p = tc->getProcessPtr();
673
674 //XXX This will only work in faults from a SparcLiveProcess
675 SparcLiveProcess *lp = dynamic_cast<SparcLiveProcess *>(p);
676 assert(lp);
677
678 // Then adjust the PC and NPC
679 tc->pcState(lp->readSpillStart());
680 }
681}
682
683void
684FillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst)
685{
686 if (FullSystem) {
687 SparcFaultBase::invoke(tc, inst);
688 } else {
689 doNormalFault(tc, trapType(), false);
690
691 Process *p = tc->getProcessPtr();
692
693 //XXX This will only work in faults from a SparcLiveProcess
694 SparcLiveProcess *lp = dynamic_cast<SparcLiveProcess *>(p);
695 assert(lp);
696
697 // Then adjust the PC and NPC
698 tc->pcState(lp->readFillStart());
699 }
700}
701
702void
703TrapInstruction::invoke(ThreadContext *tc, StaticInstPtr inst)
704{
705 if (FullSystem) {
706 SparcFaultBase::invoke(tc, inst);
707 } else {
708 // In SE, this mechanism is how the process requests a service from
709 // the operating system. We'll get the process object from the thread
710 // context and let it service the request.
711
712 Process *p = tc->getProcessPtr();
713
714 SparcLiveProcess *lp = dynamic_cast<SparcLiveProcess *>(p);
715 assert(lp);
716
717 lp->handleTrap(_n, tc);
718
719 // We need to explicitly advance the pc, since that's not done for us
720 // on a faulting instruction
721 PCState pc = tc->pcState();
722 pc.advance();
723 tc->pcState(pc);
724 }
725}
726
727} // namespace SparcISA
728