1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 614 unchanged lines hidden (view full) ---

623 }
624
625 Process *p = tc->getProcessPtr();
626 TlbEntry entry;
627 bool success = p->pTable->lookup(vaddr, entry);
628 if (!success) {
629 panic("Tried to execute unmapped address %#x.\n", vaddr);
630 } else {
631 Addr alignedVaddr = p->pTable->pageAlign(vaddr);
632 tc->getITBPtr()->insert(alignedVaddr, 0 /*partition id*/,
633 p->_pid /*context id*/, false, entry.pte);
634 }
635}
636
637void
638FastDataAccessMMUMiss::invoke(ThreadContext *tc, const StaticInstPtr &inst)
639{
640 if (FullSystem) {
641 SparcFaultBase::invoke(tc, inst);

--- 5 unchanged lines hidden (view full) ---

647 bool success = p->pTable->lookup(vaddr, entry);
648 if (!success) {
649 if (p->fixupStackFault(vaddr))
650 success = p->pTable->lookup(vaddr, entry);
651 }
652 if (!success) {
653 panic("Tried to access unmapped address %#x.\n", vaddr);
654 } else {
655 Addr alignedVaddr = p->pTable->pageAlign(vaddr);
656 tc->getDTBPtr()->insert(alignedVaddr, 0 /*partition id*/,
657 p->_pid /*context id*/, false, entry.pte);
658 }
659}
660
661void
662SpillNNormal::invoke(ThreadContext *tc, const StaticInstPtr &inst)
663{
664 if (FullSystem) {
665 SparcFaultBase::invoke(tc, inst);

--- 63 unchanged lines hidden ---